mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / asrock / z87e-itx / bootblock.c
bloba64cdfb72384739a471a189e31ab1c4b8c0dfb2c
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/pnp_ops.h>
4 #include <superio/nuvoton/common/nuvoton.h>
5 #include <superio/nuvoton/nct6776/nct6776.h>
6 #include <southbridge/intel/lynxpoint/pch.h>
8 void mainboard_config_superio(void)
10 const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);
11 const pnp_devfn_t SERIAL_DEV = PNP_DEV(0x2e, NCT6776_SP1);
12 const pnp_devfn_t ACPI_DEV = PNP_DEV(0x2e, NCT6776_ACPI);
14 nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
16 nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
18 /* Power RAM in S3 and let the PCH handle power failure actions. */
19 pnp_set_logical_device(ACPI_DEV);
20 pnp_write_config(ACPI_DEV, 0xe4, 0x70);
22 nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);