mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / erying / tgl / bootblock.c
blob15be8ce2d8decd5d5b6ed01038bba7f3f0ba3988
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
4 #include <superio/ite/common/ite.h>
5 #include <superio/ite/it8613e/it8613e.h>
6 #include <gpio.h>
8 #define GPIO_DEV PNP_DEV(0x2e, IT8613E_GPIO)
9 #define UART_DEV PNP_DEV(0x2e, IT8613E_SP1)
11 void bootblock_mainboard_early_init(void)
13 ite_reg_write(GPIO_DEV, 0x29, 0xc1); /* 3VSB - RAM loses power in S3 anyway */
14 ite_reg_write(GPIO_DEV, 0x2c, 0x41); /* disable k8 power seq */
15 ite_enable_serial(UART_DEV, CONFIG_TTYS0_BASE);