mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / intel / adlrvp / Makefile.mk
blobb63953c0e03b0a50d1cb588446e25aa498b8f586
1 ## SPDX-License-Identifier: GPL-2.0-only
3 subdirs-y += spd
5 bootblock-y += bootblock.c
6 bootblock-$(CONFIG_CHROMEOS) += chromeos.c
7 ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
8 bootblock-y += early_gpio_n.c
9 ramstage-y += gpio_n.c
10 else
11 bootblock-y += early_gpio.c
12 ramstage-y += gpio.c
13 endif
15 verstage-$(CONFIG_CHROMEOS) += chromeos.c
17 romstage-$(CONFIG_CHROMEOS) += chromeos.c
18 romstage-y += romstage_fsp_params.c
19 romstage-y += board_id.c
20 romstage-y += memory.c
21 ifeq ($(CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC),y)
22 romstage-y += memory_rpl.c
23 endif
25 ramstage-$(CONFIG_CHROMEOS) += chromeos.c
26 ramstage-y += ec.c
27 ramstage-y += mainboard.c
28 ramstage-y += board_id.c
29 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
30 ramstage-y += ramstage.c
32 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
34 subdirs-y += variants/$(VARIANT_DIR)