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mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / intel / adlrvp / devicetree_m.cb
blob922b673ce2580f1c76c70e23717be0e3f7b6d2f2
1 fw_config
2 field AUDIO 8 10
3 option NONE 0
4 option ADL_MAX98373_ALC5682I_I2S 1
5 end
6 end
7 chip soc/intel/alderlake
8
9 # GPE configuration
10 # Note that GPE events called out in ASL code rely on this
11 # route. i.e. If this route changes then the affected GPE
12 # offset bits also need to be changed.
13 register "pmc_gpe0_dw0" = "GPP_B"
14 register "pmc_gpe0_dw1" = "GPP_D"
15 register "pmc_gpe0_dw2" = "GPP_E"
16
17 # FSP configuration
18 register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Type-C port 0
19 register "usb2_ports[1]" = "USB2_PORT_MID(OC1)" # Type-C port 1
20 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WLAN
21 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # M.2 WWAN
22 register "usb2_ports[4]" = "USB2_PORT_MID(OC2)" # Type-A port 1
23 register "usb2_ports[5]" = "USB2_PORT_MID(OC2)" # Type-A port 2
24 register "usb2_ports[6]" = "USB2_PORT_MID(OC0)" # USB3/2 Type A port1
25 register "usb2_ports[7]" = "USB2_PORT_MID(OC0)" # USB3/2 Type A port2
26 register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A port3
27 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
28
29 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-A port 1
30 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-A port 2
31 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN
32 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WLAN
33
34 # Sagv Configuration
35 register "sagv" = "SaGv_Enabled"
36
37 # Enable CNVi Bluetooth
38 register "cnvi_bt_core" = "true"
39
40 # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
41 register "gen1_dec" = "0x00fc0801"
42 register "gen2_dec" = "0x000c0201"
43 # EC memory map range is 0x900-0x9ff
44 register "gen3_dec" = "0x00fc0901"
45
46 #Enable PCH PCIE RP 4 using CLK 5
47 register "pch_pcie_rp[PCH_RP(4)]" = "{
48 .clk_src = 5,
49 .clk_req = 5,
50 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR,
51 .PcieRpL1Substates = L1_SS_L1_2,
52 }"
53
54 # Enable PCH PCIE RP 5 using CLK 2
55 register "pch_pcie_rp[PCH_RP(5)]" = "{
56 .clk_src = 2,
57 .clk_req = 2,
58 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR,
59 .PcieRpL1Substates = L1_SS_L1_2,
60 }"
61
62 # Enable PCH PCIE RP 9 using CLK 3
63 register "pch_pcie_rp[PCH_RP(9)]" = "{
64 .clk_src = 3,
65 .clk_req = 3,
66 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR,
67 .PcieRpL1Substates = L1_SS_L1_2,
68 }"
69
70 #Enable PCH PCIE RP 10 using CLK 1
71 register "pch_pcie_rp[PCH_RP(10)]" = "{
72 .clk_src = 1,
73 .clk_req = 1,
74 .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR,
75 .PcieRpL1Substates = L1_SS_L1_2,
76 }"
77
78 # Hybrid storage mode
79 register "hybrid_storage_mode" = "true"
80
81 # Enable CPU PCIE RP 1 using CLK 0
82 register "cpu_pcie_rp[CPU_RP(1)]" = "{
83 .clk_req = 0,
84 .clk_src = 0,
85 .flags = PCIE_RP_LTR | PCIE_RP_AER,
86 }"
87
88 # Enable EDP in PortA
89 register "ddi_portA_config" = "1"
90 # Enable HDMI in Port B
91 register "ddi_ports_config" = "{
92 [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
93 }"
94
95 # TCSS USB3
96 register "tcss_aux_ori" = "0"
97
98 register "s0ix_enable" = "true"
99
100 register "serial_io_i2c_mode" = "{
101 [PchSerialIoIndexI2C0] = PchSerialIoPci,
102 [PchSerialIoIndexI2C1] = PchSerialIoPci,
103 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
104 [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
105 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
106 [PchSerialIoIndexI2C5] = PchSerialIoPci,
107 }"
108
109 register "serial_io_gspi_mode" = "{
110 [PchSerialIoIndexGSPI0] = PchSerialIoPci,
111 [PchSerialIoIndexGSPI1] = PchSerialIoPci,
112 [PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
113 [PchSerialIoIndexGSPI3] = PchSerialIoDisabled,
114 }"
115
116 register "serial_io_gspi_cs_mode" = "{
117 [PchSerialIoIndexGSPI0] = 0,
118 [PchSerialIoIndexGSPI1] = 1,
119 [PchSerialIoIndexGSPI2] = 0,
120 [PchSerialIoIndexGSPI3] = 0,
121 }"
122
123 register "serial_io_gspi_cs_state" = "{
124 [PchSerialIoIndexGSPI0] = 0,
125 [PchSerialIoIndexGSPI1] = 0,
126 [PchSerialIoIndexGSPI2] = 0,
127 [PchSerialIoIndexGSPI3] = 0,
128 }"
129
130 register "serial_io_uart_mode" = "{
131 [PchSerialIoIndexUART0] = PchSerialIoSkipInit,
132 [PchSerialIoIndexUART1] = PchSerialIoDisabled,
133 [PchSerialIoIndexUART2] = PchSerialIoDisabled,
134 }"
135
136 # HD Audio
137 register "pch_hda_dsp_enable" = "1"
138 register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
139 register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
140 register "pch_hda_idisp_codec_enable" = "1"
141
142 # Intel Common SoC Config
143 register "common_soc_config" = "{
144 .gspi[1] = {
145 .speed_mhz = 1,
146 .early_init = 1,
147 },
148 .i2c[0] = {
149 .speed = I2C_SPEED_FAST,
150 },
151 .i2c[1] = {
152 .speed = I2C_SPEED_FAST,
153 },
154 .i2c[2] = {
155 .speed = I2C_SPEED_FAST,
156 },
157 .i2c[3] = {
158 .speed = I2C_SPEED_FAST,
159 },
160 .i2c[5] = {
161 .speed = I2C_SPEED_FAST,
162 },
163 }"
164
165 device domain 0 on
166 device ref pcie5_0 on end
167 device ref igpu on end
168 device ref dtt on end
169 device ref ipu on
170 chip drivers/intel/mipi_camera
171 register "acpi_uid" = "0x50000"
172 register "acpi_name" = ""IPU0""
173 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
174
175 register "cio2_num_ports" = "2"
176 register "cio2_lanes_used" = "{2,2}"
177 register "cio2_lane_endpoint[0]" = ""^I2C5.CAM1""
178 register "cio2_lane_endpoint[1]" = ""^I2C1.CAM0""
179 register "cio2_prt[0]" = "2"
180 register "cio2_prt[1]" = "1"
181 device generic 0 on end
182 end
183 end
184 device ref pcie4_0 on end
185 device ref pcie4_1 on end
186 device ref tbt_pcie_rp0 on end
187 device ref tbt_pcie_rp1 on end
188 device ref tcss_xhci on
189 chip drivers/usb/acpi
190 register "type" = "UPC_TYPE_HUB"
191 device ref tcss_root_hub on
192 chip drivers/usb/acpi
193 register "desc" = ""TypeC Port 1""
194 device ref tcss_usb3_port1 on end
195 end
196 chip drivers/usb/acpi
197 register "desc" = ""TypeC Port 2""
198 device ref tcss_usb3_port2 on end
199 end
200 end
201 end
202 end
203 device ref tcss_dma0 on end
204 device ref xhci on
205 chip drivers/usb/acpi
206 register "desc" = ""Root Hub""
207 register "type" = "UPC_TYPE_HUB"
208 device ref xhci_root_hub on
209 chip drivers/usb/acpi
210 register "desc" = ""Bluetooth""
211 register "type" = "UPC_TYPE_INTERNAL"
212 device ref usb2_port10 on end
213 end
214 end
215 end
216 end
217 device ref cnvi_wifi on
218 chip drivers/wifi/generic
219 register "wake" = "GPE0_PME_B0"
220 device generic 0 on end
221 end
222 end
223 device ref i2c0 on
224 chip drivers/i2c/generic
225 register "hid" = ""10EC5682""
226 register "name" = ""RT58""
227 register "desc" = ""Headset Codec""
228 register "irq" = "ACPI_IRQ_EDGE_HIGH(GPP_H3_IRQ)"
229 # Set the jd_src to RT5668_JD1 for jack detection
230 register "property_count" = "1"
231 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
232 register "property_list[0].name" = ""realtek,jd-src""
233 register "property_list[0].integer" = "1"
234 device i2c 1a on
235 probe AUDIO ADL_MAX98373_ALC5682I_I2S
236 end
237 end
238 chip drivers/i2c/max98373
239 register "vmon_slot_no" = "0"
240 register "imon_slot_no" = "1"
241 register "uid" = "0"
242 register "desc" = ""Right Speaker Amp""
243 register "name" = ""MAXR""
244 device i2c 31 on
245 probe AUDIO ADL_MAX98373_ALC5682I_I2S
246 end
247 end
248 chip drivers/i2c/max98373
249 register "vmon_slot_no" = "2"
250 register "imon_slot_no" = "3"
251 register "uid" = "1"
252 register "desc" = ""Left Speaker Amp""
253 register "name" = ""MAXL""
254 device i2c 32 on
255 probe AUDIO ADL_MAX98373_ALC5682I_I2S
256 end
257 end
258 chip drivers/i2c/hid
259 register "generic.hid" = ""WACOM PWB-D893""
260 register "generic.desc" = ""WACOM Touchscreen""
261 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F18_IRQ)"
262 register "generic.probed" = "1"
263 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F17)"
264 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F7)"
265 register "generic.enable_delay_ms" = "1"
266 register "generic.reset_delay_ms" = "300"
267 register "generic.has_power_resource" = "1"
268 register "hid_desc_reg_offset" = "0x01"
269 device i2c 0a on end
270 end
271 chip drivers/i2c/hid
272 register "generic.hid" = ""ELAN0000""
273 register "generic.desc" = ""ELAN Touchpad""
274 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D11_IRQ)"
275 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H1)"
276 register "generic.wake" = "GPE0_DW1_11"
277 register "generic.detect" = "1"
278 register "generic.has_power_resource" = "1"
279 device i2c 15 on end
280 end
281 end
282 device ref i2c1 on
283 chip drivers/intel/mipi_camera
284 register "acpi_hid" = ""OVTI5675""
285 register "acpi_uid" = "0"
286 register "acpi_name" = ""CAM0""
287 register "chip_name" = ""Ov 5675 Camera""
288 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
289
290 register "ssdb.lanes_used" = "2"
291 register "ssdb.vcm_type" = "0x0C"
292 register "vcm_name" = ""VCM0""
293 register "num_freq_entries" = "1"
294 register "link_freq[0]" = "450000000"
295 register "remote_name" = ""IPU0""
296
297 register "has_power_resource" = "1"
298 #Controls
299 register "clk_panel.clks[0].clknum" = "0" #IMGCLKOUT_0
300 register "clk_panel.clks[0].freq" = "1" #19.2 Mhz
301 register "gpio_panel.gpio[0].gpio_num" = "GPP_B23" #power_enable
302 register "gpio_panel.gpio[1].gpio_num" = "GPP_R5" #reset
303
304 #_ON
305 register "on_seq.ops_cnt" = "4"
306 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
307 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 2)"
308 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 1)"
309 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 1)"
310
311 #_OFF
312 register "off_seq.ops_cnt" = "3"
313 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
314 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
315 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
316
317 device i2c 36 on end
318 end
319 chip drivers/intel/mipi_camera
320 register "acpi_uid" = "3"
321 register "acpi_name" = ""VCM0""
322 register "chip_name" = ""DW AF VCM""
323 register "device_type" = "INTEL_ACPI_CAMERA_VCM"
324
325 register "pr0" = ""\\_SB.PCI0.I2C1.CAM0.PRIC""
326 register "vcm_compat" = ""dongwoon,dw9714""
327
328 device i2c 0C on end
329 end
330 end
331 device ref i2c2 on end
332 device ref i2c3 on end
333 device ref heci1 on end
334 device ref sata on end
335 device ref i2c5 on
336 chip drivers/intel/mipi_camera
337 register "acpi_hid" = ""OVTI5675""
338 register "acpi_uid" = "0"
339 register "acpi_name" = ""CAM1""
340 register "chip_name" = ""Ov 5675 Camera""
341 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
342
343 register "ssdb.lanes_used" = "2"
344 register "num_freq_entries" = "1"
345 register "link_freq[0]" = "450000000"
346 register "remote_name" = ""IPU0""
347
348 register "has_power_resource" = "1"
349 #Controls
350 register "clk_panel.clks[0].clknum" = "1" #IMGCLKOUT_1
351 register "clk_panel.clks[0].freq" = "1" #19.2 Mhz
352 register "gpio_panel.gpio[0].gpio_num" = "GPP_E16" #power_enable
353 register "gpio_panel.gpio[1].gpio_num" = "GPP_E15" #reset
354
355 #_ON
356 register "on_seq.ops_cnt" = "4"
357 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
358 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 2)"
359 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 1)"
360 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 1)"
361
362 #_OFF
363 register "off_seq.ops_cnt" = "3"
364 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
365 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
366 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
367
368 device i2c 36 on end
369 end
370 end
371 device ref pcie_rp1 on end
372 device ref pcie_rp3 on end # W/A to FSP issue
373 device ref pcie_rp4 on end # W/A to FSP issue
374 device ref pcie_rp5 on end
375 device ref pcie_rp6 on end
376 device ref pcie_rp8 on end
377 device ref pcie_rp9 on end
378 device ref pcie_rp10 on end
379 device ref uart0 on end
380 device ref gspi0 on end
381 device ref p2sb on end
382 device pci 1e.3 on
383 chip drivers/spi/acpi
384 register "hid" = "ACPI_DT_NAMESPACE_HID"
385 register "compat_string" = ""google,cr50""
386 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E3_IRQ)"
387 device spi 0 on end
388 end
389 end # GSPI1
390 device ref hda on
391 chip drivers/intel/soundwire
392 device generic 0 on
393 chip drivers/soundwire/alc711
394 # SoundWire Link 0 ID 1
395 register "desc" = ""Headset Codec""
396 device generic 0.1 on end
397 end
398 end
399 end
400 end
401 device ref smbus on end
402 end
403 end
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