mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / intel / adlrvp / dsdt.asl
blobf379610866b96fc3e119dfa277ea34c8944be597
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <baseboard/ec.h>
5 #include <baseboard/gpio.h>
7 DefinitionBlock(
8         "dsdt.aml",
9         "DSDT",
10         ACPI_DSDT_REV_2,
11         OEM_ID,
12         ACPI_TABLE_CREATOR,
13         0x20110725
16         #include <acpi/dsdt_top.asl>
17         #include <soc/intel/common/block/acpi/acpi/platform.asl>
18         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
19         #include <cpu/intel/common/acpi/cpu.asl>
21         Device (\_SB.PCI0) {
22                 #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
23                 #include <soc/intel/alderlake/acpi/southbridge.asl>
24                 #include <soc/intel/alderlake/acpi/tcss.asl>
25         }
27 #if CONFIG(EC_GOOGLE_CHROMEEC)
28         /* ChromeOS Embedded Controller */
29         Scope (\_SB.PCI0.LPCB)
30         {
31                 /* ACPI code for EC SuperIO functions */
32                 #include <ec/google/chromeec/acpi/superio.asl>
33                 /* ACPI code for EC functions */
34                 #include <ec/google/chromeec/acpi/ec.asl>
35         }
36 #endif
38         #include <southbridge/intel/common/acpi/sleepstates.asl>