mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / intel / adlrvp / early_gpio_n.c
blob3eb1ceae52aa689f2bae9f2a9b6161fe13ebf332
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <soc/gpio.h>
7 /* Early pad configuration in bootblock */
8 static const struct pad_config early_gpio_table[] = {
9 /* WWAN_RST# */
10 PAD_CFG_GPO(GPP_F14, 0, PLTRST),
11 /* WWAN_PWR_EN */
12 PAD_CFG_GPO(GPP_D17, 1, DEEP),
13 /* EC_IN_RW */
14 PAD_CFG_GPI(GPP_E7, NONE, DEEP),
17 static const struct pad_config early_uart_gpio_table[] = {
18 /* UART0 RX */
19 PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
20 /* UART0 TX */
21 PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
24 void variant_configure_early_gpio_pads(void)
26 if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
27 gpio_configure_pads(early_uart_gpio_table, ARRAY_SIZE(early_uart_gpio_table));
29 gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));