mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / intel / baskingridge / smihandler.c
blobff4c66d9dd4d8f7119b8aadb192e6101cecf1655
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <arch/io.h>
5 #include <cpu/x86/smm.h>
6 #include <southbridge/intel/lynxpoint/pch.h>
7 #include <southbridge/intel/lynxpoint/me.h>
8 #include <northbridge/intel/haswell/haswell.h>
9 #include <cpu/intel/haswell/haswell.h>
12 * Change LED_POWER# (SIO GPIO 45) state based on sleep type.
13 * The IO address is hardcoded as we don't have device path in SMM.
15 #define SIO_GPIO_BASE_SET4 (0x730 + 3)
16 #define SIO_GPIO_BLINK_GPIO45 0x25
17 void mainboard_smi_sleep(u8 slp_typ)
19 u8 reg8;
21 switch (slp_typ) {
22 case ACPI_S3:
23 case ACPI_S4:
24 break;
26 case ACPI_S5:
27 /* Turn off LED */
28 reg8 = inb(SIO_GPIO_BASE_SET4);
29 reg8 |= (1 << 5);
30 outb(reg8, SIO_GPIO_BASE_SET4);
31 break;