mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / lenovo / m900_tiny / bootblock.c
blobab5f402f29b16e46543593b3b07c9e5612e62b28
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
4 #include <device/pnp_ops.h>
5 #include <mainboard/gpio.h>
6 #include <soc/gpio.h>
7 #include <superio/nuvoton/common/nuvoton.h>
8 #include <superio/nuvoton/nct6687d/nct6687d.h>
10 #define SERIAL_DEV PNP_DEV(0x2e, NCT6687D_SP1)
11 #define POWER_DEV PNP_DEV(0x2e, NCT6687D_SLEEP_PWR)
13 void bootblock_mainboard_early_init(void)
15 mainboard_configure_early_gpios();
17 /* Replicate vendor settings for multi-function pins in global config LDN */
18 nuvoton_pnp_enter_conf_state(SERIAL_DEV);
19 pnp_write_config(SERIAL_DEV, 0x13, 0x0c);
20 pnp_write_config(SERIAL_DEV, 0x1d, 0x08);
21 pnp_write_config(SERIAL_DEV, 0x1f, 0xf0);
22 pnp_write_config(SERIAL_DEV, 0x22, 0xbc);
23 pnp_write_config(SERIAL_DEV, 0x23, 0xdf);
24 pnp_write_config(SERIAL_DEV, 0x24, 0x81);
25 pnp_write_config(SERIAL_DEV, 0x25, 0xff);
26 pnp_write_config(SERIAL_DEV, 0x29, 0x6d);
27 pnp_write_config(SERIAL_DEV, 0x2a, 0x8f);
29 /* Configure pin for PECI */
30 pnp_set_logical_device(POWER_DEV);
31 pnp_write_config(POWER_DEV, 0xf3, 0x0c);
33 nuvoton_pnp_exit_conf_state(POWER_DEV);
35 /* Enable serial */
36 if (CONFIG(CONSOLE_SERIAL))
37 nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);