mb/ocp/tiogapass: Fix GPIOs
[coreboot2.git] / src / mainboard / lenovo / m900_tiny / cmos.layout
blob322fa7d10e5d843b6899542db06a8abcd40923c8
1 ## SPDX-License-Identifier: GPL-2.0-only
3 # -----------------------------------------------------------------
4 entries
6 #start-bit length  config config-ID     name
8 # -----------------------------------------------------------------
9 0       120     r       0       reserved_memory
11 # -----------------------------------------------------------------
12 # RTC_BOOT_BYTE (coreboot hardcoded)
13 384     1       e       4       boot_option
14 388     4       h       0       reboot_counter
16 # -----------------------------------------------------------------
17 # coreboot config options: console
18 395     4       e       6       debug_level
20 # coreboot config options: cpu
21 400     1       e       1       hyper_threading
23 # coreboot config options: southbridge
24 408     1       e       1       nmi
25 409     2       e       7       power_on_after_fail
27 # coreboot config options: ME
28 416     1       e       2       me_state
29 417     3       h       0       me_state_counter
31 # coreboot config options: check sums
32 984     16      h       0       check_sum
34 # -----------------------------------------------------------------
36 enumerations
38 #ID     value   text
39 1       0       Disable
40 1       1       Enable
41 2       0       Enable
42 2       1       Disable
43 4       0       Fallback
44 4       1       Normal
45 6       0       Emergency
46 6       1       Alert
47 6       2       Critical
48 6       3       Error
49 6       4       Warning
50 6       5       Notice
51 6       6       Info
52 6       7       Debug
53 6       8       Spew
54 7       0       Disable
55 7       1       Enable
56 7       2       Keep
57 # -----------------------------------------------------------------
58 checksums
60 checksum 392 423 984