src/mainboard/lenovo/m920q/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <bootblock_common.h>
   4 #include <device/pnp_ops.h>
   5 #include <mainboard/gpio.h>
   6 #include <soc/gpio.h>
   7 #include <superio/nuvoton/common/nuvoton.h>
   8 #include <superio/nuvoton/nct6687d/nct6687d.h>
   9
  10 #define SERIAL_DEV PNP_DEV(0x2e, NCT6687D_SP2)
  11 #define POWER_DEV  PNP_DEV(0x2e, NCT6687D_SLEEP_PWR)
  12
  13 void bootblock_mainboard_early_init(void)
  14 {
  15         /* Replicate vendor settings for multi-function pins in global config LDN */
  16         nuvoton_pnp_enter_conf_state(SERIAL_DEV);
  17         pnp_write_config(SERIAL_DEV, 0x13, 0xff);
  18         pnp_write_config(SERIAL_DEV, 0x14, 0xff);
  19
  20         /* Below are multi-pin function */
  21         pnp_write_config(SERIAL_DEV, 0x1b, 0xf8);
  22         pnp_write_config(SERIAL_DEV, 0x1f, 0xf0);
  23         pnp_write_config(SERIAL_DEV, 0x20, 0xd4);
  24         pnp_write_config(SERIAL_DEV, 0x21, 0x41);
  25         pnp_write_config(SERIAL_DEV, 0x22, 0xbc);
  26         pnp_write_config(SERIAL_DEV, 0x23, 0xff);
  27         pnp_write_config(SERIAL_DEV, 0x24, 0x07);
  28         pnp_write_config(SERIAL_DEV, 0x25, 0xff);
  29         pnp_write_config(SERIAL_DEV, 0x26, 0x80);
  30         pnp_write_config(SERIAL_DEV, 0x28, 0x08);
  31         pnp_write_config(SERIAL_DEV, 0x29, 0x95);
  32         pnp_write_config(SERIAL_DEV, 0x2a, 0xcf);
  33
  34         pnp_set_logical_device(POWER_DEV);
  35         /* Configure pin for PECI */
  36         pnp_write_config(POWER_DEV, 0xf3, 0x18);
  37
  38         nuvoton_pnp_exit_conf_state(POWER_DEV);
  39
  40         if (CONFIG(CONSOLE_SERIAL))
  41                 nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  42 }