src/southbridge/intel/bd82x6x/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y)
   4
   5 bootblock-y += bootblock.c
   6 bootblock-y += early_pch.c
   7
   8 ramstage-y += pch.c
   9 ramstage-y += azalia.c
  10 ramstage-y += common.c
  11 ramstage-y += fadt.c
  12 ramstage-y += lpc.c
  13 ramstage-y += pci.c
  14 ramstage-y += pcie.c
  15 ramstage-y += sata.c
  16 ramstage-y += usb_ehci.c
  17 ramstage-y += usb_xhci.c
  18 ramstage-y += me.c
  19 ramstage-y += me_8.x.c
  20 ramstage-y += me_common.c
  21 ramstage-y += smbus.c
  22 ramstage-y += ../common/pciehp.c
  23
  24 ramstage-y += me_status.c
  25
  26 ramstage-$(CONFIG_ELOG) += elog.c
  27
  28 smm-y += common.c smihandler.c me_smm.c me_common.c
  29
  30 romstage-y += common.c
  31 romstage-y += me_status.c
  32 romstage-y += early_rcba.c
  33 romstage-y += early_pch.c
  34
  35 ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
  36 romstage-y += early_thermal.c early_me.c early_usb.c
  37 else
  38 romstage-y += early_me_mrc.c early_usb_mrc.c
  39 endif
  40
  41 CPPFLAGS_common += -I$(src)/southbridge/intel/bd82x6x/include
  42
  43 endif