src/mainboard/emulation/spike-riscv/rom_media.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 #include <boot_device.h>
   3
   4 /*
   5  * 0x80000000 is this start of RAM. We currently need to load coreboot.rom into
   6  * RAM on SPIKE, because SPIKE doesn't support loading custom code into the
   7  * boot ROM.
   8  */
   9 static const struct mem_region_device boot_dev =
  10         MEM_REGION_DEV_RO_INIT(0x80000000, CONFIG_ROM_SIZE);
  11
  12 const struct region_device *boot_device_ro(void)
  13 {
  14         return &boot_dev.rdev;
  15 }