1 chip soc
/intel
/alderlake
2 # Intel Common SoC Config
3 #
+-------------------+---------------------------+
5 #
+-------------------+---------------------------+
8 #| I2C2 | External graphic |
9 #| I2C3 | cr50 TPM. Early init is |
10 #| | required
to set up a BAR |
11 #| |
for TPM communication |
13 #
+-------------------+---------------------------+
14 register
"common_soc_config" = "{
16 .speed = I2C_SPEED_FAST,
19 .data_hold_time_ns = 50,
22 .speed = I2C_SPEED_FAST,
25 .data_hold_time_ns = 50,
28 .speed = I2C_SPEED_FAST,
31 .data_hold_time_ns = 50,
35 .speed = I2C_SPEED_FAST,
38 .data_hold_time_ns = 50,
41 .speed = I2C_SPEED_FAST,
44 .data_hold_time_ns = 50,
48 register
"tcc_offset" = "3" # TCC of
97
49 register
"sagv" = "SaGv_Disabled"
50 register
"tcss_aux_ori" = "0x10"
51 register
"typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
53 register
"usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1
54 register
"usb2_ports[2]" = "USB2_PORT_MAX_TYPE_C(OC2)" #
set to Max
for USB2_C2
55 register
"usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M
.2 WWAN
56 register
"usb2_ports[4]" = "USB2_PORT_EMPTY" #
57 register
"usb2_ports[6]" = "USB2_PORT_EMPTY" #
58 register
"usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" #
Type-A Port A2
60 register
"usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3
/2 Type A port A2
61 register
"usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M
.2 WWAN
63 register
"serial_io_i2c_mode" = "{
64 [PchSerialIoIndexI2C0] = PchSerialIoPci,
65 [PchSerialIoIndexI2C1] = PchSerialIoPci,
66 [PchSerialIoIndexI2C2] = PchSerialIoPci,
67 [PchSerialIoIndexI2C3] = PchSerialIoPci,
68 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
69 [PchSerialIoIndexI2C5] = PchSerialIoPci,
72 register
"serial_io_gspi_mode" = "{
73 [PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
74 [PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
78 device ref tbt_pcie_rp0 off
end
79 device ref tbt_pcie_rp1 off
end
80 device ref tbt_pcie_rp2 off
end
82 device ref tcss_dma0 off
end
83 device ref tcss_dma1 off
end
85 # Enable CPU PCIe RP
1 using CLKREQ
0 and CLKSRC
0
86 register
"cpu_pcie_rp[CPU_RP(1)]" = "{
89 .flags = PCIE_RP_LTR | PCIE_RP_AER,
91 device generic
0 alias dgpu on
end
94 chip drivers
/intel
/dptf
96 register
"options.tsr[0].desc" = ""DRAM
""
97 register
"options.tsr[1].desc" = ""GPU
""
98 register
"options.tsr[2].desc" = ""Charger
""
99 # TODO
: below values are initial reference values only
101 register
"policies.active" = "{
113 .target = DPTF_TEMP_SENSOR_1,
124 register
"policies.passive" = "{
125 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
126 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
127 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000),
128 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
131 register
"policies.critical" = "{
132 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
133 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 105, SHUTDOWN),
134 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 105, SHUTDOWN),
135 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 105, SHUTDOWN),
137 register
"controls.power_limits" = "{
141 .time_window_min = 28 * MSECS_PER_SEC,
142 .time_window_max = 32 * MSECS_PER_SEC,
148 .time_window_min = 28 * MSECS_PER_SEC,
149 .time_window_max = 32 * MSECS_PER_SEC,
153 register
"oem_data.oem_variables" = "{
156 ## Charger Performance
Control (Control, mA
)
157 register
"controls.charger_perf" = "{
163 ## Fan Performance
Control (Percent
, Speed
, Noise
, Power
)
164 register
"controls.fan_perf" = "{
165 [0] = { 90, 4700, 220, 2200, },
166 [1] = { 80, 4500, 180, 1800, },
167 [2] = { 70, 4300, 145, 1450, },
168 [3] = { 60, 3700, 115, 1150, },
169 [4] = { 50, 3300, 90, 900, },
170 [5] = { 40, 3100, 55, 550, },
171 [6] = { 30, 2800, 30, 300, },
172 [7] = { 20, 2500, 15, 150, },
173 [8] = { 10, 2300, 10, 100, },
174 [9] = { 0, 0, 0, 50, }
178 register
"options.fan.fine_grained_control" = "1"
179 register
"options.fan.step_size" = "2"
181 device generic
0 alias dptf_policy on
end
184 device ref cnvi_wifi on
185 chip drivers
/wifi
/generic
186 register
"wake" = "GPE0_PME_B0"
187 device generic
0 on
end
191 chip drivers
/i2c
/generic
192 register
"hid" = ""RTL5682
""
193 register
"name" = ""RT58
""
194 register
"desc" = ""Headset Codec
""
195 register
"irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
196 #
Set the jd_src
to RT5668_JD1
for jack detection
197 register
"property_count" = "1"
198 register
"property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
199 register
"property_list[0].name" = ""realtek
,jd
-src
""
200 register
"property_list[0].integer" = "1"
204 device ref i2c1 on
end # GPU
205 device ref i2c2 on
end # External GPU
208 register
"hid" = ""GOOG0005
""
209 register
"irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
214 chip drivers
/i2c
/generic
215 register
"hid" = ""ELAN0000
""
216 register
"desc" = ""ELAN Touchpad
""
217 register
"irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
218 register
"wake" = "GPE0_DW2_14"
219 register
"detect" = "1"
223 device ref pcie_rp3 on
224 # Enable PCIE
3 using clk
4
225 register
"pch_pcie_rp[PCH_RP(3)]" = "{
228 .flags = PCIE_RP_LTR | PCIE_RP_AER,
231 register
"customized_leds" = "0x05af"
232 register
"wake" = "GPE0_DW0_07"
233 register
"device_index" = "0"
234 register
"add_acpi_dma_property" = "true"
235 device pci
00.0 on
end
237 end #RTL8111H Ethernet NIC
238 device ref pcie_rp4 off
end
239 device ref pcie_rp6 off
end
240 device ref pcie_rp7 off
end
241 device ref pcie_rp8 on
242 chip soc
/intel
/common
/block
/pcie
/rtd3
243 register
"enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
244 register
"reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
245 register
"srcclk_pin" = "3"
246 device generic
0 on
end
250 chip drivers
/generic
/max98357a
251 register
"hid" = ""MX98360A
""
252 register
"sdmode_gpio" =
253 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
254 register
"sdmode_delay" = "5"
255 device generic
0 on
end
258 device ref pch_espi on
259 chip ec
/google
/chromeec
260 use conn0
as mux_conn
[0]
261 use conn1
as mux_conn
[1]
262 device pnp
0c09.0 on
end
265 device ref pmc hidden
266 chip drivers
/intel
/pmc_mux
268 chip drivers
/intel
/pmc_mux
/conn
269 use usb2_port1
as usb2_port
270 use tcss_usb3_port3
as usb3_port
271 device generic
0 alias conn0 on
end
273 chip drivers
/intel
/pmc_mux
/conn
274 use usb2_port3
as usb2_port
275 use tcss_usb3_port1
as usb3_port
276 device generic
1 alias conn1 on
end
281 device ref tcss_xhci on
282 chip drivers
/usb
/acpi
283 device ref tcss_root_hub on
284 chip drivers
/usb
/acpi
285 register
"desc" = ""USB3
Type-C Port C0
(MLB
)""
286 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
287 register
"use_custom_pld" = "true"
288 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
289 device ref tcss_usb3_port1 on
end
291 chip drivers
/usb
/acpi
292 register
"desc" = ""USB3
Type-C Port C2
(MLB
)""
293 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
294 register
"use_custom_pld" = "true"
295 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
296 device ref tcss_usb3_port3 on
end
302 chip drivers
/usb
/acpi
303 device ref xhci_root_hub on
304 chip drivers
/usb
/acpi
305 register
"desc" = ""USB2
Type-C Port C0
(MLB
)""
306 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
307 register
"use_custom_pld" = "true"
308 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))"
309 device ref usb2_port1 on
end
311 chip drivers
/usb
/acpi
312 register
"desc" = ""USB2
Type-C Port C2
(MLB
)""
313 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
314 register
"use_custom_pld" = "true"
315 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
316 device ref usb2_port3 on
end
318 chip drivers
/usb
/acpi
319 register
"desc" = ""USB2 Camera
""
320 register
"type" = "UPC_TYPE_INTERNAL"
321 device ref usb2_port6 on
end
323 chip drivers
/usb
/acpi
324 register
"desc" = ""USB2
Type-A Port
2""
325 register
"type" = "UPC_TYPE_A"
326 register
"use_custom_pld" = "true"
327 register
"custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 2))"
328 device ref usb2_port8 on
end
330 chip drivers
/usb
/acpi
331 register
"desc" = ""USB2
Type-A Port
0""
332 register
"type" = "UPC_TYPE_A"
333 register
"use_custom_pld" = "true"
334 register
"custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
335 device ref usb2_port9 on
end
337 chip drivers
/usb
/acpi
338 register
"desc" = ""USB2 Bluetooth
""
339 register
"type" = "UPC_TYPE_INTERNAL"
340 register
"reset_gpio" =
341 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
342 device ref usb2_port10 on
end
344 chip drivers
/usb
/acpi
345 register
"desc" = ""USB3
Type-A Port
0""
346 register
"type" = "UPC_TYPE_USB3_A"
347 register
"use_custom_pld" = "true"
348 register
"custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
349 device ref usb3_port1 on
end
351 chip drivers
/usb
/acpi
352 register
"desc" = ""USB3
Type-A Port
2""
353 register
"type" = "UPC_TYPE_USB3_A"
354 register
"use_custom_pld" = "true"
355 register
"custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 2))"
356 device ref usb3_port2 on
end