cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / google / brya / variants / anahera4es / overridetree.cb
blobc7cce88989d87af2a0f29fc885329da501d6f25b
1 fw_config
2 field DB_SD 0 1
3 option SD_ABSENT 0
4 option SD_GL9750 1
5 end
6 field KB_BL 2 2
7 option KB_BL_ABSENT 0
8 option KB_BL_PRESENT 1
9 end
10 field AUDIO 3 5
11 option AUDIO_UNKNOWN 0
12 option MAX98360_ALC5682I_I2S 1
13 option MAX98360_ALC5682IVS_I2S 2
14 end
15 field DB_LTE 6 7
16 option LTE_ABSENT 0
17 option LTE_USB 1
18 end
19 field EPS 10 10
20 option PRIVACY_SCREEN_ABSENT 0
21 option PRIVACY_SCREEN 1
22 end
23 end
24 chip soc/intel/alderlake
25 register "sagv" = "SaGv_Enabled"
26 # Acoustic settings
27 register "acoustic_noise_mitigation" = "1"
28 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
29 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
30 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
31 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
33 # Intel Common SoC Config
34 #+-------------------+---------------------------+
35 #| Field | Value |
36 #+-------------------+---------------------------+
37 #| GSPI1 | Fingerprint MCU |
38 #| I2C0 | Audio |
39 #| I2C1 | Touchscreen |
40 #| I2C2 | |
41 #| I2C3 | cr50 TPM. Early init is |
42 #| | required to set up a BAR |
43 #| | for TPM communication |
44 #| I2C5 | Trackpad |
45 #+-------------------+---------------------------+
46 register "common_soc_config" = "{
47 .i2c[0] = {
48 .speed = I2C_SPEED_FAST,
50 .i2c[1] = {
51 .speed = I2C_SPEED_FAST,
53 .i2c[2] = {
54 .speed = I2C_SPEED_FAST,
56 .i2c[3] = {
57 .early_init = 1,
58 .speed = I2C_SPEED_FAST,
60 .i2c[5] = {
61 .speed = I2C_SPEED_FAST,
64 register "tcc_offset" = "3" # TCC of 97C
65 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
66 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Smart Card
67 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
68 register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
69 device domain 0 on
70 device ref igpu on
71 chip drivers/gfx/generic
72 register "device_count" = "6"
73 # DDIA for eDP
74 register "device[0].name" = ""LCD""
75 # Use ChromeOS privacy screen _HID
76 register "device[0].hid" = ""GOOG0010""
77 # Internal panel on the first port of the graphics chip
78 register "device[0].addr" = "0x80010400"
79 register "device[0].privacy.enabled" = "1"
80 register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)"
81 # DDIB for HDMI
82 register "device[1].name" = ""DD01""
83 # TCP0 (DP-1) for port C0
84 register "device[2].name" = ""DD02""
85 register "device[2].use_pld" = "true"
86 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
87 # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
88 register "device[3].name" = ""DD03""
89 # TCP2 (DP-3) for port C2
90 register "device[4].name" = ""DD04""
91 register "device[4].use_pld" = "true"
92 register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
93 # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
94 register "device[5].name" = ""DD05""
95 device generic 0 on
96 probe EPS PRIVACY_SCREEN
97 end
98 end
99 chip drivers/gfx/generic
100 register "device_count" = "6"
101 # DDIA for eDP
102 register "device[0].name" = ""LCD""
103 # Internal panel on the first port of the graphics chip
104 register "device[0].addr" = "0x80010400"
105 # DDIB for HDMI
106 register "device[1].name" = ""DD01""
107 # TCP0 (DP-1) for port C0
108 register "device[2].name" = ""DD02""
109 register "device[2].use_pld" = "true"
110 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
111 # TCP1 (DP-2) is unused for any ports but still enumerated, so GFX device is added for TCP1
112 register "device[3].name" = ""DD03""
113 # TCP2 (DP-3) for port C2
114 register "device[4].name" = ""DD04""
115 register "device[4].use_pld" = "true"
116 register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
117 # TCP3 (DP-4) is unused for any ports but still enumerated, so GFX device is added for TCP3
118 register "device[5].name" = ""DD05""
119 device generic 0 on
120 probe EPS PRIVACY_SCREEN_ABSENT
123 end # Integrated Graphics Device
124 device ref dtt on
125 chip drivers/intel/dptf
126 ## sensor information
127 register "options.tsr[0].desc" = ""DRAM""
128 register "options.tsr[1].desc" = ""Soc""
129 register "options.tsr[2].desc" = ""Charger""
130 register "options.tsr[3].desc" = ""Regulator""
131 # TODO: below values are initial reference values only
132 ## Passive Policy
133 register "policies.passive" = "{
134 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
135 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
136 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000),
137 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
138 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 75, 5000),
140 ## Critical Policy
141 register "policies.critical" = "{
142 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
143 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
144 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
145 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
146 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN),
148 register "controls.power_limits" = "{
149 .pl1 = {
150 .min_power = 3000,
151 .max_power = 15000,
152 .time_window_min = 28 * MSECS_PER_SEC,
153 .time_window_max = 32 * MSECS_PER_SEC,
154 .granularity = 200,
156 .pl2 = {
157 .min_power = 55000,
158 .max_power = 55000,
159 .time_window_min = 28 * MSECS_PER_SEC,
160 .time_window_max = 32 * MSECS_PER_SEC,
161 .granularity = 1000,
164 ## Charger Performance Control (Control, mA)
165 register "controls.charger_perf" = "{
166 [0] = { 255, 1700 },
167 [1] = { 24, 1500 },
168 [2] = { 16, 1000 },
169 [3] = { 8, 500 }
171 device generic 0 on end
174 device ref tbt_pcie_rp1 off end
175 device ref cnvi_wifi on
176 chip drivers/wifi/generic
177 register "wake" = "GPE0_PME_B0"
178 device generic 0 on end
181 device ref pcie_rp6 off end
182 device ref pcie_rp7 on
183 # Enable PCIE eMMC bridge 7 using clk 6
184 register "pch_pcie_rp[PCH_RP(7)]" = "{
185 .clk_src = 6,
186 .clk_req = 6,
187 .flags = PCIE_RP_HOTPLUG | PCIE_RP_AER,
189 end #PCIE7 EMMC
190 device ref tcss_dma0 on
191 chip drivers/intel/usb4/retimer
192 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
193 use tcss_usb3_port1 as dfp[0].typec_port
194 device generic 0 on end
197 device ref tcss_dma1 on
198 chip drivers/intel/usb4/retimer
199 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
200 use tcss_usb3_port3 as dfp[0].typec_port
201 device generic 0 on end
204 device ref pcie_rp8 on
205 chip soc/intel/common/block/pcie/rtd3
206 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
207 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
208 register "srcclk_pin" = "3"
209 device generic 0 on end
211 end #PCIE8 SD card
212 device ref i2c0 on
213 chip drivers/i2c/generic
214 register "hid" = ""10EC5682""
215 register "name" = ""RT58""
216 register "desc" = ""Headset Codec""
217 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
218 # Set the jd_src to RT5668_JD1 for jack detection
219 register "property_count" = "1"
220 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
221 register "property_list[0].name" = ""realtek,jd-src""
222 register "property_list[0].integer" = "1"
223 device i2c 1a on
224 probe AUDIO MAX98360_ALC5682I_I2S
227 chip drivers/i2c/generic
228 register "hid" = ""RTL5682""
229 register "name" = ""RT58""
230 register "desc" = ""Headset Codec""
231 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
232 # Set the jd_src to RT5668_JD1 for jack detection
233 register "property_count" = "1"
234 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
235 register "property_list[0].name" = ""realtek,jd-src""
236 register "property_list[0].integer" = "1"
237 device i2c 1a on
238 probe AUDIO MAX98360_ALC5682IVS_I2S
241 end #I2C0
242 device ref i2c1 on
243 chip drivers/i2c/generic
244 register "hid" = ""ELAN0001""
245 register "desc" = ""ELAN Touchscreen""
246 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
247 register "detect" = "1"
248 register "reset_gpio" =
249 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
250 register "reset_delay_ms" = "100"
251 register "reset_off_delay_ms" = "5"
252 register "enable_gpio" =
253 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
254 register "enable_delay_ms" = "10"
255 register "enable_off_delay_ms" = "1"
256 register "stop_gpio" =
257 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
258 register "has_power_resource" = "1"
259 device i2c 10 on end
261 chip drivers/i2c/hid
262 register "generic.hid" = ""GTCH7503""
263 register "generic.desc" = ""G2TOUCH Touchscreen""
264 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
265 register "generic.detect" = "1"
266 register "generic.reset_gpio" =
267 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
268 register "generic.reset_delay_ms" = "50"
269 register "generic.enable_gpio" =
270 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
271 register "generic.enable_delay_ms" = "1"
272 register "generic.has_power_resource" = "1"
273 register "hid_desc_reg_offset" = "0x01"
274 device i2c 40 on end
277 device ref i2c3 on
278 chip drivers/i2c/tpm
279 register "hid" = ""GOOG0005""
280 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
281 device i2c 50 on end
284 device ref i2c5 on
285 chip drivers/i2c/generic
286 register "hid" = ""ELAN0000""
287 register "desc" = ""ELAN Touchpad""
288 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
289 register "wake" = "GPE0_DW2_14"
290 register "detect" = "1"
291 device i2c 15 on end
294 device ref hda on
295 chip drivers/generic/max98357a
296 register "hid" = ""MX98360A""
297 register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
298 register "sdmode_delay" = "5"
299 device generic 0 on end
302 device ref gspi1 on
303 chip drivers/spi/acpi
304 register "name" = ""CRFP""
305 register "hid" = "ACPI_DT_NAMESPACE_HID"
306 register "uid" = "1"
307 register "compat_string" = ""google,cros-ec-spi""
308 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
309 register "wake" = "GPE0_DW2_15"
310 register "has_power_resource" = "1"
311 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
312 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
313 register "enable_delay_ms" = "3"
314 device spi 0 hidden end
315 end # FPMCU
317 device ref pch_espi on
318 chip ec/google/chromeec
319 use conn0 as mux_conn[0]
320 use conn1 as mux_conn[1]
321 device pnp 0c09.0 on end
324 device ref pmc hidden
325 chip drivers/intel/pmc_mux
326 device generic 0 on
327 chip drivers/intel/pmc_mux/conn
328 use usb2_port1 as usb2_port
329 use tcss_usb3_port1 as usb3_port
330 device generic 0 alias conn0 on end
332 chip drivers/intel/pmc_mux/conn
333 use usb2_port3 as usb2_port
334 use tcss_usb3_port3 as usb3_port
335 device generic 1 alias conn1 on end
340 device ref tcss_xhci on
341 chip drivers/usb/acpi
342 device ref tcss_root_hub on
343 chip drivers/usb/acpi
344 register "desc" = ""USB3 Type-C Port C0 (MLB)""
345 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
346 register "use_custom_pld" = "true"
347 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
348 device ref tcss_usb3_port1 on end
350 chip drivers/usb/acpi
351 register "desc" = ""USB3 Type-C Port C2 (DB)""
352 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
353 register "use_custom_pld" = "true"
354 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
355 device ref tcss_usb3_port3 on end
360 device ref xhci on
361 chip drivers/usb/acpi
362 device ref xhci_root_hub on
363 chip drivers/usb/acpi
364 register "desc" = ""USB2 Type-C Port C0 (MLB)""
365 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
366 register "use_custom_pld" = "true"
367 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
368 device ref usb2_port1 on end
370 chip drivers/usb/acpi
371 register "desc" = ""USB2 Type-A Port (MLB)""
372 register "type" = "UPC_TYPE_A"
373 register "use_custom_pld" = "true"
374 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 2))"
375 device ref usb2_port2 on end
377 chip drivers/usb/acpi
378 register "desc" = ""USB2 Type-C Port C2 (DB)""
379 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
380 register "use_custom_pld" = "true"
381 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
382 device ref usb2_port3 on end
384 chip drivers/usb/acpi
385 register "desc" = ""USB2 WWAN""
386 register "type" = "UPC_TYPE_INTERNAL"
387 device ref usb2_port4 on end
389 chip drivers/usb/acpi
390 register "desc" = ""USB2 Camera""
391 register "type" = "UPC_TYPE_INTERNAL"
392 device ref usb2_port6 on end
394 chip drivers/usb/acpi
395 register "desc" = ""USB2 Type-A Port (DB)""
396 register "type" = "UPC_TYPE_A"
397 register "use_custom_pld" = "true"
398 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
399 device ref usb2_port9 on end
401 chip drivers/usb/acpi
402 register "desc" = ""USB2 Bluetooth""
403 register "type" = "UPC_TYPE_INTERNAL"
404 register "reset_gpio" =
405 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
406 device ref usb2_port10 on end
408 chip drivers/usb/acpi
409 register "desc" = ""USB3 Type-A Port (DB)""
410 register "type" = "UPC_TYPE_USB3_A"
411 register "use_custom_pld" = "true"
412 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
413 device ref usb3_port1 on end
415 chip drivers/usb/acpi
416 register "desc" = ""USB3 Type-A Port (MLB)""
417 register "type" = "UPC_TYPE_USB3_A"
418 register "use_custom_pld" = "true"
419 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 2))"
420 device ref usb3_port3 on end
422 chip drivers/usb/acpi
423 register "desc" = ""USB3 WWAN""
424 register "type" = "UPC_TYPE_INTERNAL"
425 device ref usb3_port4 on end