1 chip soc
/intel
/alderlake
2 register
"sagv" = "SaGv_Enabled"
4 # Intel Common SoC Config
5 #
+-------------------+---------------------------+
7 #
+-------------------+---------------------------+
9 #| I2C1 | cr50 TPM. Early init is |
10 #| | required
to set up a BAR |
11 #| |
for TPM communication |
13 #
+-------------------+---------------------------+
14 register
"common_soc_config" = "{
16 .speed = I2C_SPEED_FAST,
20 .speed = I2C_SPEED_FAST,
23 .speed = I2C_SPEED_FAST,
27 register
"ext_fivr_settings" = "{
28 .configure_ext_fivr = 1,
29 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
30 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
31 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
32 FIVR_VOLTAGE_MIN_ACTIVE |
33 FIVR_VOLTAGE_MIN_RETENTION,
34 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
35 FIVR_VOLTAGE_MIN_ACTIVE |
36 FIVR_VOLTAGE_MIN_RETENTION,
37 .v1p05_icc_max_ma = 500,
38 .vnn_sx_voltage_mv = 1250,
42 register
"domain_vr_config[VR_DOMAIN_IA]" = "{
43 .vr_config_enable = 1,
45 .tdc_timewindow = 28000,
46 .tdc_currentlimit = 256,
51 register
"domain_vr_config[VR_DOMAIN_GT]" = "{
52 .vr_config_enable = 1,
54 .tdc_timewindow = 28000,
55 .tdc_currentlimit = 256,
60 register
"usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable Port
3
61 register
"usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable Port
4
62 register
"usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable Port
6
63 register
"usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # DCI port
64 register
"usb2_ports[8]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3
66 register
"usb3_ports[0]" = "USB3_PORT_EMPTY"
67 register
"usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # DCI port
68 register
"usb3_ports[2]" = "USB3_PORT_EMPTY"
69 register
"usb3_ports[3]" = "USB3_PORT_EMPTY"
71 register
"tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)"
74 register
"serial_io_i2c_mode" = "{
75 [PchSerialIoIndexI2C0] = PchSerialIoPci,
76 [PchSerialIoIndexI2C1] = PchSerialIoPci,
77 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
78 [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
79 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
80 [PchSerialIoIndexI2C5] = PchSerialIoPci,
83 register
"serial_io_gspi_mode" = "{
84 [PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
85 [PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
88 register
"tcc_offset" = "10" # TCC of
90
90 register
"power_limits_config[ADL_P_282_442_482_28W_CORE]" = "{
91 .tdp_pl1_override = 30,
92 .tdp_pl2_override = 60,
98 chip drivers
/gfx
/generic
99 register
"device_count" = "6"
101 register
"device[0].name" = ""LCD
""
102 # Internal panel on the first port of the graphics chip
103 register
"device[0].addr" = "0x80010400"
105 register
"device[1].name" = ""DD01
""
106 # TCP0
(DP
-1) for port C0
107 register
"device[2].name" = ""DD02
""
108 register
"device[2].use_pld" = "true"
109 register
"device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
110 # TCP1
(DP
-2) for port C1
111 register
"device[3].name" = ""DD03
""
112 register
"device[3].use_pld" = "true"
113 register
"device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
114 # TCP2
(DP
-3) for port C2
115 register
"device[4].name" = ""DD04
""
116 register
"device[4].use_pld" = "true"
117 register
"device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
118 # TCP3
(DP
-4) for port C3
119 register
"device[5].name" = ""DD05
""
120 register
"device[5].use_pld" = "true"
121 register
"device[5].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(4, 1))"
122 device generic
0 on
end
124 end # Integrated Graphics Device
126 chip drivers
/intel
/dptf
127 ## sensor information
128 register
"options.tsr[0].desc" = ""DRAM_SOC
""
129 register
"options.tsr[1].desc" = ""Ambient
""
130 register
"options.tsr[2].desc" = ""Charger
""
132 # TODO
: below values are initial reference values only
134 register
"policies.active" = "{
146 .target = DPTF_TEMP_SENSOR_1,
158 register
"policies.passive" = "{
159 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
160 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 5000),
161 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 5000),
162 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 85, 5000),
166 register
"policies.critical" = "{
167 [0] = DPTF_CRITICAL(CPU, 127, SHUTDOWN),
168 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
169 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
170 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
173 register
"controls.power_limits" = "{
177 .time_window_min = 30 * MSECS_PER_SEC,
178 .time_window_max = 30 * MSECS_PER_SEC,
184 .time_window_min = 32 * MSECS_PER_SEC,
185 .time_window_max = 32 * MSECS_PER_SEC,
190 ## Charger Performance
Control (Control, mA
)
191 register
"controls.charger_perf" = "{
198 ## Fan Performance
Control (Percent
, Speed
, Noise
, Power
)
199 register
"controls.fan_perf" = "{
200 [0] = { 90, 6700, 220, 2200, },
201 [1] = { 80, 5800, 180, 1800, },
202 [2] = { 70, 5000, 145, 1450, },
203 [3] = { 60, 4900, 115, 1150, },
204 [4] = { 50, 3838, 90, 900, },
205 [5] = { 40, 2904, 55, 550, },
206 [6] = { 30, 2337, 30, 300, },
207 [7] = { 20, 1608, 15, 150, },
208 [8] = { 10, 800, 10, 100, },
209 [9] = { 0, 0, 0, 50, }
213 register
"options.fan.fine_grained_control" = "1"
214 register
"options.fan.step_size" = "2"
216 device generic
0 alias dptf_policy on
end
219 device ref pcie4_0 on
220 # Enable CPU PCIE RP
1 using CLK
0
221 register
"cpu_pcie_rp[CPU_RP(1)]" = "{
224 .flags = PCIE_RP_LTR | PCIE_RP_AER,
227 device ref tbt_pcie_rp3 on
end
228 device ref cnvi_wifi on
229 chip drivers
/wifi
/generic
230 register
"wake" = "GPE0_PME_B0"
231 device generic
0 on
end
234 device ref pcie_rp6 off
end
235 device ref pcie_rp8 off
end
236 device ref pcie_rp9 off
end
237 device ref tcss_dma0 on
238 chip drivers
/intel
/usb4
/retimer
239 register
"dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
240 register
"dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
241 use tcss_usb3_port1
as dfp
[0].typec_port
242 use tcss_usb3_port2
as dfp
[1].typec_port
243 device generic
0 on
end
246 device ref tcss_dma1 on
247 chip drivers
/intel
/usb4
/retimer
248 register
"dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
249 register
"dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
250 use tcss_usb3_port3
as dfp
[0].typec_port
251 use tcss_usb3_port4
as dfp
[1].typec_port
252 device generic
0 on
end
256 chip drivers
/i2c
/generic
257 register
"hid" = ""RTL5682
""
258 register
"name" = ""RT58
""
259 register
"desc" = ""Headset Codec
""
260 register
"irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
261 #
Set the jd_src
to RT5668_JD1
for jack detection
262 register
"property_count" = "1"
263 register
"property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
264 register
"property_list[0].name" = ""realtek
,jd
-src
""
265 register
"property_list[0].integer" = "1"
268 chip drivers
/generic
/gpio_keys
269 register
"name" = ""MUTE
""
270 register
"label" = ""mic_mute_switch
""
271 register
"gpio" = "ACPI_GPIO_INPUT_ACTIVE_HIGH(GPP_F22)"
272 register
"key.wakeup_route" = "WAKEUP_ROUTE_DISABLED"
273 register
"key.dev_name" = ""MMSW
""
274 register
"key.linux_code" = "SW_MUTE_DEVICE"
275 register
"key.linux_input_type" = "EV_SW"
276 register
"key.label" = ""mic_mute_switch_key
""
277 device generic
0 on
end
282 register
"hid" = ""GOOG0005
""
283 register
"irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
289 register
"generic.hid" = ""PNP0C50
""
290 register
"generic.desc" = ""PIXART Touchpad
""
291 register
"generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
292 register
"generic.wake" = "GPE0_DW2_14"
293 register
"generic.detect" = "1"
294 register
"hid_desc_reg_offset" = "0x20"
299 chip drivers
/generic
/max98357a
300 register
"hid" = ""MX98360A
""
301 register
"sdmode_gpio" =
302 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
303 register
"sdmode_delay" = "5"
304 device generic
0 on
end
307 register
"spkr_tplg" = "max98360a"
308 register
"jack_tplg" = "rt5682"
309 register
"mic_tplg" = "_2ch_pdm1"
310 device generic
0 on
end
313 device ref gspi1 off
end
314 device ref pch_espi on
315 chip ec
/google
/chromeec
316 use conn0
as mux_conn
[0]
317 use conn1
as mux_conn
[1]
318 use conn2
as mux_conn
[2]
319 use conn3
as mux_conn
[3]
320 device pnp
0c09.0 on
end
323 device ref pmc hidden
324 chip drivers
/intel
/pmc_mux
326 chip drivers
/intel
/pmc_mux
/conn
327 use usb2_port1
as usb2_port
328 use tcss_usb3_port1
as usb3_port
329 device generic
0 alias conn0 on
end
331 chip drivers
/intel
/pmc_mux
/conn
332 use usb2_port2
as usb2_port
333 use tcss_usb3_port2
as usb3_port
334 device generic
1 alias conn1 on
end
336 chip drivers
/intel
/pmc_mux
/conn
337 use usb2_port3
as usb2_port
338 use tcss_usb3_port3
as usb3_port
339 device generic
2 alias conn2 on
end
341 chip drivers
/intel
/pmc_mux
/conn
342 use usb2_port9
as usb2_port
343 use tcss_usb3_port4
as usb3_port
344 device generic
3 alias conn3 on
end
349 device ref tcss_xhci on
350 chip drivers
/usb
/acpi
351 device ref tcss_root_hub on
352 chip drivers
/usb
/acpi
353 register
"desc" = ""USB3
Type-C Port C0
(MLB
)""
354 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
355 register
"use_custom_pld" = "true"
356 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
357 device ref tcss_usb3_port1 on
end
359 chip drivers
/usb
/acpi
360 register
"desc" = ""USB3
Type-C Port C1
(MLB
)""
361 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
362 register
"use_custom_pld" = "true"
363 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
364 device ref tcss_usb3_port2 on
end
366 chip drivers
/usb
/acpi
367 register
"desc" = ""USB3
Type-C Port C2
(DB
)""
368 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
369 register
"use_custom_pld" = "true"
370 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
371 device ref tcss_usb3_port3 on
end
373 chip drivers
/usb
/acpi
374 register
"desc" = ""USB3
Type-C Port C3
(DB
)""
375 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
376 register
"use_custom_pld" = "true"
377 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(4, 1))"
378 device ref tcss_usb3_port4 on
end
384 chip drivers
/usb
/acpi
385 device ref xhci_root_hub on
386 chip drivers
/usb
/acpi
387 register
"desc" = ""USB2
Type-C Port C0
(MLB
)""
388 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
389 register
"use_custom_pld" = "true"
390 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
391 device ref usb2_port1 on
end
393 chip drivers
/usb
/acpi
394 register
"desc" = ""USB2
Type-C Port C1
(MLB
)""
395 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
396 register
"use_custom_pld" = "true"
397 register
"custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
398 device ref usb2_port2 on
end
400 chip drivers
/usb
/acpi
401 register
"desc" = ""USB2
Type-C Port C2
(DB
)""
402 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
403 register
"use_custom_pld" = "true"
404 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
405 device ref usb2_port3 on
end
407 chip drivers
/usb
/acpi
408 register
"desc" = ""USB2 Camera
""
409 register
"type" = "UPC_TYPE_INTERNAL"
410 device ref usb2_port6 on
end
412 chip drivers
/usb
/acpi
413 register
"desc" = ""USB2
Type-C Port C3
(DB
)""
414 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
415 register
"use_custom_pld" = "true"
416 register
"custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(4, 1))"
417 device ref usb2_port9 on
end
419 chip drivers
/usb
/acpi
420 register
"desc" = ""USB2 Bluetooth
""
421 register
"type" = "UPC_TYPE_INTERNAL"
422 register
"reset_gpio" =
423 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
424 device ref usb2_port10 on
end
429 device ref smbus on
end