cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / google / brya / variants / craask / overridetree.cb
blobafc35193e4fc743b76e657658f744c233a262702
1 fw_config
2 field DB_USB 0 1
3 option DB_NONE 0
4 option DB_1C_1A 1
5 option DB_1C_LTE 2
6 option DB_1A_HDMI 3
7 end
8 field WFC 2 3
9 option WFC_ABSENT 0
10 option WFC_MIPI_OVTI5675 1
11 option WFC_MIPI_OVTI8856 2
12 end
13 field STYLUS 4
14 option STYLUS_ABSENT 0
15 option STYLUS_PRESENT 1
16 end
17 field SD_CARD 5
18 option SD_PRESENT 0
19 option SD_ABSENT 1
20 end
21 field AMP 6 7
22 option AMP_MX98360A 0
23 option AMP_ALC5650 1
24 end
25 field THERMAL_SOLUTION 10 12
26 option THERMAL_SOLUTION_6W 0
27 option THERMAL_SOLUTION_15W 1
28 end
29 field WIFI_SAR_ID 13 15
30 option ID_0 0
31 end
32 field CODEC 32 33
33 option CODEC_ALC5682I_VS 0
34 option CODEC_NAU8825 1
35 option CODEC_ALC5650 2
36 end
37 field TS_SOURCE 38 41
38 option TS_UNPROVISIONED 0
39 option TS_GTCH7503 1
40 option TS_ILTK0001 2
41 end
42 end
44 chip soc/intel/alderlake
45 register "sagv" = "SaGv_Enabled"
47 # EMMC Tx CMD Delay
48 # Refer to EDS-Vol2-42.3.7.
49 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
50 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
51 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
53 # EMMC TX DATA Delay 1
54 # Refer to EDS-Vol2-42.3.8.
55 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
56 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
57 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
59 # EMMC TX DATA Delay 2
60 # Refer to EDS-Vol2-42.3.9.
61 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
62 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
63 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
64 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
65 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
67 # EMMC RX CMD/DATA Delay 1
68 # Refer to EDS-Vol2-42.3.10.
69 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
70 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
71 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
72 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
73 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F3C"
75 # EMMC RX CMD/DATA Delay 2
76 # Refer to EDS-Vol2-42.3.12.
77 # [17:16] stands for Rx Clock before Output Buffer,
78 # 00: Rx clock after output buffer,
79 # 01: Rx clock before output buffer,
80 # 10: Automatic selection based on working mode.
81 # 11: Reserved
82 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
83 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
84 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10023"
86 # EMMC Rx Strobe Delay
87 # Refer to EDS-Vol2-42.3.11.
88 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
89 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
90 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x11515"
92 # SOC Aux orientation override:
93 # This is a bitfield that corresponds to up to 4 TCSS ports.
94 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
95 # TcssAuxOri = 0101b
96 # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
97 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
98 # motherboard to USBC connector
99 register "tcss_aux_ori" = "5"
101 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
102 register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
104 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
106 # Configure external V1P05/Vnn/VnnSx Rails
107 register "ext_fivr_settings" = "{
108 .configure_ext_fivr = 1,
109 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0,
110 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
111 .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX,
112 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
113 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE,
114 .v1p05_voltage_mv = 1050,
115 .vnn_voltage_mv = 780,
116 .vnn_sx_voltage_mv = 1050,
117 .v1p05_icc_max_ma = 500,
118 .vnn_icc_max_ma = 500,
121 # Enable the Cnvi BT Audio Offload
122 register "cnvi_bt_audio_offload" = "1"
124 # Intel Common SoC Config
125 #+-------------------+---------------------------+
126 #| Field | Value |
127 #+-------------------+---------------------------+
128 #| I2C0 | TPM. Early init is |
129 #| | required to set up a BAR |
130 #| | for TPM communication |
131 #| I2C1 | Touchscreen |
132 #| I2C2 | Sub-board(PSensor)/WCAM |
133 #| I2C3 | Audio |
134 #| I2C5 | Trackpad |
135 #+-------------------+---------------------------+
136 register "common_soc_config" = "{
137 .i2c[0] = {
138 .early_init = 1,
139 .speed = I2C_SPEED_FAST_PLUS,
140 .speed_config[0] = {
141 .speed = I2C_SPEED_FAST_PLUS,
142 .scl_lcnt = 55,
143 .scl_hcnt = 30,
144 .sda_hold = 7,
147 .i2c[1] = {
148 .speed = I2C_SPEED_FAST,
149 .speed_config[0] = {
150 .speed = I2C_SPEED_FAST,
151 .scl_lcnt = 158,
152 .scl_hcnt = 79,
153 .sda_hold = 30,
156 .i2c[2] = {
157 .speed = I2C_SPEED_FAST,
158 .speed_config[0] = {
159 .speed = I2C_SPEED_FAST,
160 .scl_lcnt = 158,
161 .scl_hcnt = 79,
162 .sda_hold = 7,
165 .i2c[3] = {
166 .speed = I2C_SPEED_FAST,
167 .speed_config[0] = {
168 .speed = I2C_SPEED_FAST,
169 .scl_lcnt = 158,
170 .scl_hcnt = 79,
171 .sda_hold = 7,
174 .i2c[5] = {
175 .speed = I2C_SPEED_FAST,
176 .speed_config[0] = {
177 .speed = I2C_SPEED_FAST,
178 .scl_lcnt = 158,
179 .scl_hcnt = 79,
180 .sda_hold = 40,
186 register "power_limits_config[ADL_N_041_6W_CORE]" = "{
187 .tdp_pl1_override = 6,
188 .tdp_pl2_override = 25,
189 .tdp_pl4 = 78,
192 register "power_limits_config[ADL_N_021_6W_CORE]" = "{
193 .tdp_pl1_override = 6,
194 .tdp_pl2_override = 25,
195 .tdp_pl4 = 78,
198 device domain 0 on
199 device ref dtt on
200 chip drivers/intel/dptf
201 ## sensor information
202 register "options.tsr[0].desc" = ""Memory""
203 register "options.tsr[1].desc" = ""Charger""
204 register "options.tsr[2].desc" = ""Ambient""
206 # TODO: below values are initial reference values only
207 ## Passive Policy
208 register "policies.passive" = "{
209 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
210 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
211 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
212 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
215 ## Critical Policy
216 register "policies.critical" = "{
217 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
218 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
219 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
220 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
223 register "controls.power_limits" = "{
224 .pl1 = {
225 .min_power = 5500,
226 .max_power = 6000,
227 .time_window_min = 28 * MSECS_PER_SEC,
228 .time_window_max = 28 * MSECS_PER_SEC,
229 .granularity = 200
231 .pl2 = {
232 .min_power = 25000,
233 .max_power = 25000,
234 .time_window_min = 1,
235 .time_window_max = 1,
236 .granularity = 1000
240 ## Charger Performance Control (Control, mA)
241 register "controls.charger_perf" = "{
242 [0] = { 255, 1700 },
243 [1] = { 24, 1500 },
244 [2] = { 16, 1000 },
245 [3] = { 8, 500 }
248 device generic 0 on
249 probe THERMAL_SOLUTION THERMAL_SOLUTION_6W
252 chip drivers/intel/dptf
253 ## sensor information
254 register "options.tsr[0].desc" = ""Memory""
255 register "options.tsr[1].desc" = ""Charger""
256 register "options.tsr[2].desc" = ""Ambient""
258 # TODO: below values are initial reference values only
259 ## Passive Policy
260 register "policies.passive" = "{
261 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
262 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
263 [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000),
264 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
267 ## Critical Policy
268 register "policies.critical" = "{
269 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
270 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
271 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
272 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
275 register "controls.power_limits" = "{
276 .pl1 = {
277 .min_power = 15000,
278 .max_power = 15000,
279 .time_window_min = 28 * MSECS_PER_SEC,
280 .time_window_max = 28 * MSECS_PER_SEC,
281 .granularity = 125
283 .pl2 = {
284 .min_power = 35000,
285 .max_power = 35000,
286 .time_window_min = 1,
287 .time_window_max = 1,
288 .granularity = 1000
292 ## Charger Performance Control (Control, mA)
293 register "controls.charger_perf" = "{
294 [0] = { 255, 1700 },
295 [1] = { 24, 1500 },
296 [2] = { 16, 1000 },
297 [3] = { 8, 500 }
300 device generic 1 on
301 probe THERMAL_SOLUTION THERMAL_SOLUTION_15W
305 device ref ipu on
306 chip drivers/intel/mipi_camera
307 register "acpi_uid" = "0x50000"
308 register "acpi_name" = ""IPU0""
309 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
311 register "cio2_num_ports" = "1"
312 register "cio2_lanes_used" = "{2}" # 2 CSI Camera lanes are used
313 register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
314 register "cio2_prt[0]" = "1"
315 device generic 0 on end
317 probe WFC WFC_MIPI_OVTI5675
318 probe WFC WFC_MIPI_OVTI8856
321 device ref cnvi_wifi on
322 chip drivers/wifi/generic
323 register "enable_cnvi_ddr_rfim" = "true"
324 device generic 0 on end
328 device ref i2c1 on
329 chip drivers/i2c/hid
330 register "generic.hid" = ""GTCH7502""
331 register "generic.desc" = ""G2 Touchscreen""
332 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
333 register "generic.detect" = "1"
334 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
335 register "generic.reset_delay_ms" = "120"
336 register "generic.reset_off_delay_ms" = "3"
337 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
338 register "generic.enable_delay_ms" = "12"
339 register "generic.has_power_resource" = "1"
340 register "hid_desc_reg_offset" = "0x01"
341 device i2c 0x40 on
342 probe TS_SOURCE TS_UNPROVISIONED
345 chip drivers/i2c/hid
346 register "generic.hid" = ""GTCH7503""
347 register "generic.desc" = ""G2 Touchscreen""
348 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
349 register "generic.detect" = "1"
350 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
351 register "generic.reset_delay_ms" = "120"
352 register "generic.reset_off_delay_ms" = "3"
353 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
354 register "generic.enable_delay_ms" = "12"
355 register "generic.has_power_resource" = "1"
356 register "hid_desc_reg_offset" = "0x01"
357 device i2c 0x40 on
358 probe TS_SOURCE TS_GTCH7503
361 chip drivers/generic/gpio_keys
362 register "name" = ""PENH""
363 register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
364 register "key.wake_gpe" = "GPE0_DW2_15"
365 register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
366 register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
367 register "key.dev_name" = ""EJCT""
368 register "key.linux_code" = "SW_PEN_INSERTED"
369 register "key.linux_input_type" = "EV_SW"
370 register "key.label" = ""pen_eject""
371 device generic 0 on
372 probe STYLUS STYLUS_PRESENT
375 chip drivers/i2c/hid
376 register "generic.hid" = ""ELAN9004""
377 register "generic.desc" = ""ELAN Touchscreen""
378 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
379 register "generic.detect" = "1"
380 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
381 register "generic.reset_delay_ms" = "20"
382 register "generic.reset_off_delay_ms" = "2"
383 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
384 register "generic.stop_delay_ms" = "280"
385 register "generic.stop_off_delay_ms" = "2"
386 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
387 register "generic.enable_delay_ms" = "1"
388 register "generic.has_power_resource" = "1"
389 register "hid_desc_reg_offset" = "0x01"
390 device i2c 10 on
391 probe TS_SOURCE TS_UNPROVISIONED
394 chip drivers/i2c/hid
395 register "generic.hid" = ""ILTK0001""
396 register "generic.desc" = ""ILITEK Touchscreen""
397 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
398 register "generic.detect" = "1"
399 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
400 register "generic.reset_delay_ms" = "200"
401 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
402 register "generic.enable_delay_ms" = "12"
403 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
404 register "generic.stop_off_delay_ms" = "200"
405 register "generic.has_power_resource" = "1"
406 register "hid_desc_reg_offset" = "0x01"
407 device i2c 41 on
408 probe TS_SOURCE TS_ILTK0001
412 device ref i2c2 on
413 chip drivers/intel/mipi_camera
414 register "acpi_hid" = ""OVTI5675""
415 register "acpi_uid" = "0"
416 register "acpi_name" = ""CAM0""
417 register "chip_name" = ""Ov 5675 Camera""
418 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
420 register "ssdb.lanes_used" = "2"
421 register "ssdb.link_used" = "1"
422 register "ssdb.vcm_type" = "0x0C"
423 register "vcm_name" = ""VCM0""
424 register "num_freq_entries" = "1"
425 register "link_freq[0]" = "DEFAULT_LINK_FREQ"
426 register "remote_name" = ""IPU0""
428 register "has_power_resource" = "1"
429 register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
431 #Controls
432 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
433 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
435 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
436 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X
437 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
439 #_ON
440 register "on_seq.ops_cnt" = "5"
441 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
442 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
443 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
444 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
445 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
447 #_OFF
448 register "off_seq.ops_cnt" = "4"
449 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
450 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
451 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
452 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
454 device i2c 36 on
455 probe WFC WFC_MIPI_OVTI5675
458 chip drivers/intel/mipi_camera
459 register "acpi_hid" = ""OVTI8856""
460 register "acpi_uid" = "0"
461 register "acpi_name" = ""CAM0""
462 register "chip_name" = ""Ov 8856 Camera""
463 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
464 register "has_power_resource" = "1"
465 register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
467 register "ssdb.lanes_used" = "2"
468 register "ssdb.link_used" = "1"
469 register "ssdb.vcm_type" = "0x0C"
470 register "vcm_name" = ""VCM0""
471 register "num_freq_entries" = "2"
472 register "link_freq[0]" = "720000000"
473 register "link_freq[1]" = "360000000"
474 register "remote_name" = ""IPU0""
476 #Controls
477 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
478 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
480 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
481 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X
482 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
484 #_ON
485 register "on_seq.ops_cnt" = "5"
486 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
487 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
488 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
489 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
490 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
492 #_OFF
493 register "off_seq.ops_cnt" = "4"
494 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
495 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
496 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
497 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
499 device i2c 10 on
500 probe WFC WFC_MIPI_OVTI8856
503 chip drivers/intel/mipi_camera
504 register "acpi_uid" = "3"
505 register "acpi_name" = ""VCM0""
506 register "chip_name" = ""DW AF DAC""
507 register "device_type" = "INTEL_ACPI_CAMERA_VCM"
509 register "vcm_compat" = ""dongwoon,dw9714""
510 register "has_power_resource" = "1"
511 register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD"
513 #Controls
514 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
516 #_ON
517 register "on_seq.ops_cnt" = "1"
518 register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
520 #_OFF
521 register "off_seq.ops_cnt" = "1"
522 register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
524 device i2c 0C on
525 probe WFC WFC_MIPI_OVTI5675
526 probe WFC WFC_MIPI_OVTI8856
529 chip drivers/intel/mipi_camera
530 register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
531 register "acpi_uid" = "1"
532 register "acpi_name" = ""NVM0""
533 register "chip_name" = ""GT24C08""
534 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
536 register "nvm_size" = "0x2000"
537 register "nvm_pagesize" = "1"
538 register "nvm_readonly" = "1"
539 register "nvm_width" = "0x10"
540 register "nvm_compat" = ""atmel,24c08""
542 device i2c 50 on
543 probe WFC WFC_MIPI_OVTI5675
544 probe WFC WFC_MIPI_OVTI8856
548 device ref i2c3 on
549 chip drivers/i2c/nau8825
550 register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A23)"
551 register "jkdet_enable" = "1"
552 register "jkdet_pull_enable" = "0"
553 register "jkdet_polarity" = "1" # ActiveLow
554 register "vref_impedance" = "2" # 125kOhm
555 register "micbias_voltage" = "6" # 2.754
556 register "sar_threshold_num" = "4"
557 register "sar_threshold[0]" = "0x0c"
558 register "sar_threshold[1]" = "0x1c"
559 register "sar_threshold[2]" = "0x38"
560 register "sar_threshold[3]" = "0x60"
561 register "sar_hysteresis" = "1"
562 register "sar_voltage" = "0" # VDDA
563 register "sar_compare_time" = "0" # 500ns
564 register "sar_sampling_time" = "0" # 2us
565 register "short_key_debounce" = "2" # 100ms
566 register "jack_insert_debounce" = "7" # 512ms
567 register "jack_eject_debounce" = "7" # 512ms
568 device i2c 1a on
569 probe CODEC CODEC_NAU8825
572 chip drivers/i2c/generic
573 register "hid" = ""RTL5682""
574 register "name" = ""RT58""
575 register "desc" = ""Headset Codec""
576 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
577 # Set the jd_src to RT5668_JD1 for jack detection
578 register "property_count" = "1"
579 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
580 register "property_list[0].name" = ""realtek,jd-src""
581 register "property_list[0].integer" = "1"
582 device i2c 1a on
583 probe CODEC CODEC_ALC5682I_VS
586 chip drivers/i2c/generic
587 register "hid" = ""10EC5650""
588 register "name" = ""RT58""
589 register "desc" = ""Realtek RT5650""
590 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
591 register "property_count" = "1"
592 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
593 register "property_list[0].name" = ""realtek,jd-mode""
594 register "property_list[0].integer" = "2"
595 device i2c 1a on
596 probe CODEC CODEC_ALC5650
600 device ref i2c5 on
601 chip drivers/i2c/generic
602 register "hid" = ""ELAN0000""
603 register "desc" = ""ELAN Touchpad""
604 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
605 register "wake" = "GPE0_DW2_14"
606 register "detect" = "1"
607 device i2c 15 on end
609 chip drivers/i2c/hid
610 register "generic.hid" = ""SYNA0000""
611 register "generic.cid" = ""ACPI0C50""
612 register "generic.desc" = ""Synaptics Touchpad""
613 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
614 register "generic.wake" = "GPE0_DW2_14"
615 register "generic.detect" = "1"
616 register "hid_desc_reg_offset" = "0x20"
617 device i2c 0x2c on end
619 chip drivers/i2c/hid
620 register "generic.hid" = ""PIXA2303""
621 register "generic.desc" = ""PIXA Touchpad""
622 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
623 register "generic.wake" = "GPE0_DW2_14"
624 register "generic.detect" = "1"
625 register "hid_desc_reg_offset" = "0x20"
626 device i2c 0x68 on end
629 device ref hda on
630 chip drivers/generic/max98357a
631 register "hid" = ""MX98360A""
632 register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
633 register "sdmode_delay" = "5"
634 device generic 0 on
635 probe AMP AMP_MX98360A
638 chip drivers/sof
639 register "spkr_tplg" = "max98360a"
640 register "jack_tplg" = "rt5682"
641 register "mic_tplg" = "_2ch_pdm0"
642 device generic 0 on
643 probe CODEC CODEC_ALC5682I_VS
646 chip drivers/sof
647 register "spkr_tplg" = "max98360a"
648 register "jack_tplg" = "nau8825"
649 register "mic_tplg" = "_2ch_pdm0"
650 device generic 0 on
651 probe CODEC CODEC_NAU8825
655 device ref pcie_rp7 on
656 # Enable SD Card PCIe 7 using clk 3
657 register "pch_pcie_rp[PCH_RP(7)]" = "{
658 .clk_src = 3,
659 .clk_req = 3,
660 .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
662 chip soc/intel/common/block/pcie/rtd3
663 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
664 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)"
665 register "srcclk_pin" = "3"
666 device generic 0 on end
668 probe SD_CARD SD_PRESENT
670 device ref pcie_rp9 on
671 # Enable NVMe SSD PCIe 9-12 using clk_src1 and clk_req2 mapping to hardware
672 # design.Due to inconsistency between PMC firmware and FSP, we need to set
673 # clk_src to clk_req number, not same as hardware mapping in coreboot.Then
674 # swap correct setting to clk_src=1,clk_req=2 in mFIT.
675 register "pch_pcie_rp[PCH_RP(9)]" = "{
676 .clk_src = 2,
677 .clk_req = 2,
678 .flags = PCIE_RP_LTR | PCIE_RP_AER,
681 device ref pch_espi on
682 chip ec/google/chromeec
683 use conn0 as mux_conn[0]
684 use conn1 as mux_conn[1]
685 device pnp 0c09.0 on end
688 device ref pmc hidden
689 chip drivers/intel/pmc_mux
690 device generic 0 on
691 chip drivers/intel/pmc_mux/conn
692 use usb2_port1 as usb2_port
693 use tcss_usb3_port1 as usb3_port
694 device generic 0 alias conn0 on end
696 chip drivers/intel/pmc_mux/conn
697 use usb2_port2 as usb2_port
698 use tcss_usb3_port2 as usb3_port
699 device generic 1 alias conn1 on
700 probe DB_USB DB_1C_1A
701 probe DB_USB DB_1C_LTE
707 device ref tcss_xhci on
708 chip drivers/usb/acpi
709 device ref tcss_root_hub on
710 chip drivers/usb/acpi
711 register "desc" = ""USB3 Type-C Port C0 (MLB)""
712 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
713 register "use_custom_pld" = "true"
714 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
715 device ref tcss_usb3_port1 on end
717 chip drivers/usb/acpi
718 register "desc" = ""USB3 Type-C Port C1 (DB)""
719 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
720 register "use_custom_pld" = "true"
721 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
722 device ref tcss_usb3_port2 on end
727 device ref xhci on
728 chip drivers/usb/acpi
729 device ref xhci_root_hub on
730 chip drivers/usb/acpi
731 register "desc" = ""USB2 Type-C Port C0 (MLB)""
732 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
733 register "use_custom_pld" = "true"
734 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
735 device ref usb2_port1 on end
737 chip drivers/usb/acpi
738 register "desc" = ""USB2 Type-C Port C1 (DB)""
739 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
740 register "use_custom_pld" = "true"
741 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
742 device ref usb2_port2 on
743 probe DB_USB DB_1C_1A
744 probe DB_USB DB_1C_LTE
747 chip drivers/usb/acpi
748 register "desc" = ""USB2 Type-A Port A0 (MLB)""
749 register "type" = "UPC_TYPE_A"
750 register "use_custom_pld" = "true"
751 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
752 device ref usb2_port3 on end
754 chip drivers/usb/acpi
755 register "desc" = ""USB2 Type-A Port A1 (DB)""
756 register "type" = "UPC_TYPE_A"
757 register "use_custom_pld" = "true"
758 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
759 device ref usb2_port4 on
760 probe DB_USB DB_1C_1A
761 probe DB_USB DB_1A_HDMI
764 chip drivers/usb/acpi
765 register "desc" = ""USB2 WWAN""
766 register "type" = "UPC_TYPE_INTERNAL"
767 device ref usb2_port4 on
768 probe DB_USB DB_1C_LTE
771 chip drivers/usb/acpi
772 register "desc" = ""USB2 Camera""
773 register "type" = "UPC_TYPE_INTERNAL"
774 device ref usb2_port6 on end
776 chip drivers/usb/acpi
777 register "desc" = ""USB2 Bluetooth""
778 register "type" = "UPC_TYPE_INTERNAL"
779 register "reset_gpio" =
780 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
781 device ref usb2_port10 on end
783 chip drivers/usb/acpi
784 register "desc" = ""USB3 Type-A Port A0 (MLB)""
785 register "type" = "UPC_TYPE_USB3_A"
786 register "use_custom_pld" = "true"
787 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
788 device ref usb3_port1 on end
790 chip drivers/usb/acpi
791 register "desc" = ""USB3 Type-A Port A1 (DB)""
792 register "type" = "UPC_TYPE_USB3_A"
793 register "use_custom_pld" = "true"
794 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
795 device ref usb3_port2 on
796 probe DB_USB DB_1C_1A
797 probe DB_USB DB_1A_HDMI
800 chip drivers/usb/acpi
801 register "desc" = ""USB3 WWAN""
802 register "type" = "UPC_TYPE_INTERNAL"
803 device ref usb3_port2 on
804 probe DB_USB DB_1C_LTE