src/mainboard/google/brya/variants/gothrax/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/variants.h>
   4 #include <soc/gpio.h>
   5
   6 /* Pad configuration in ramstage */
   7 static const struct pad_config override_gpio_table[] = {
   8         /* A8  : WWAN_RF_DISABLE_ODL */
   9         PAD_CFG_GPO(GPP_A8, 1, DEEP),
  10         /* H23 : WWAN_SAR_DETECT_ODL */
  11         PAD_CFG_GPO(GPP_H23, 1, DEEP),
  12         /* H3  : WLAN_PCIE_WAKE_ODL */
  13         PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
  14         /* E13  : SRCCLKREQ1# ==> WWAN_EN */
  15         PAD_CFG_GPO_LOCK(GPP_E13, 1, LOCK_CONFIG),
  16         /* F12 : WWAN_RST_L */
  17         PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
  18
  19         /* A21 : GPP_A21 ==> USB_C1_AUX_DC_P */
  20         PAD_CFG_GPO(GPP_A21, 0, DEEP),
  21         /* A22 : GPP_A22 ==> USB_C1_AUX_DC_N */
  22         PAD_CFG_GPO(GPP_A22, 1, DEEP),
  23
  24         /* C1  : SMBDATA ==> TCHSCR_RST_L */
  25         PAD_CFG_GPO(GPP_C1, 1, DEEP),
  26
  27         /* D3  : WCAM_RST_L */
  28         PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
  29         /* D15 : EN_PP2800_WCAM_X */
  30         PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
  31         /* D16 : EN_PP1800_PP1200_WCAM_X */
  32         PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
  33
  34         /* H19 : SOC_I2C_SUB_INT_ODL */
  35         PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
  36         /* H22 : WCAM_MCLK_R */
  37         PAD_NC(GPP_H22, NONE),
  38 };
  39
  40 /* Early pad configuration in bootblock */
  41 static const struct pad_config early_gpio_table[] = {
  42         /* F12 : GSXDOUT ==> WWAN_RST_L */
  43         PAD_CFG_GPO(GPP_F12, 0, DEEP),
  44         /* E13  : SRCCLKREQ1# ==> WWAN_EN */
  45         PAD_CFG_GPO(GPP_E13, 1, DEEP),
  46
  47         /* H12 : UART0_RTS# ==> SD_PERST_L */
  48         PAD_CFG_GPO(GPP_H12, 0, DEEP),
  49
  50         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  51         PAD_CFG_GPO(GPP_H20, 0, DEEP),
  52         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  53         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  54         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  55         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  56         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  57         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  58         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  59         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  60         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  61         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  62         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  63         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  64         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  65         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  66
  67         /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */
  68         PAD_CFG_GPO(GPP_H13, 1, DEEP),
  69 };
  70
  71 static const struct pad_config romstage_gpio_table[] = {
  72         /* Enable touchscreen, hold in reset */
  73         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR_X */
  74         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  75         /* C1  : SMBDATA ==> TCHSCR_RST_L */
  76         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  77         /* H12 : UART0_RTS# ==> SD_PERST_L */
  78         PAD_CFG_GPO(GPP_H12, 1, DEEP),
  79         /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
  80         PAD_CFG_GPO(GPP_H20, 1, DEEP),
  81 };
  82
  83 const struct pad_config *variant_gpio_override_table(size_t *num)
  84 {
  85         *num = ARRAY_SIZE(override_gpio_table);
  86         return override_gpio_table;
  87 }
  88
  89 const struct pad_config *variant_early_gpio_table(size_t *num)
  90 {
  91         *num = ARRAY_SIZE(early_gpio_table);
  92         return early_gpio_table;
  93 }
  94
  95 const struct pad_config *variant_romstage_gpio_table(size_t *num)
  96 {
  97         *num = ARRAY_SIZE(romstage_gpio_table);
  98         return romstage_gpio_table;
  99 }