cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / google / brya / variants / kinox / memory.c
blobe9aaea19251aad2713ec36a0e82b4038ad894329
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <boardid.h>
6 #include <gpio.h>
7 #include <soc/romstage.h>
9 static const struct mb_cfg ddr4_mem_config = {
10 .type = MEM_TYPE_DDR4,
12 .rcomp = {
13 /* Baseboard uses only 100ohm Rcomp resistors */
14 .resistor = 100,
16 /* Baseboard Rcomp target values */
17 .targets = {50, 20, 25, 25, 25},
20 .LpDdrDqDqsReTraining = 1,
22 .ect = 1, /* Early Command Training */
24 .UserBd = BOARD_TYPE_MOBILE,
26 .ddr_config = {
27 .dq_pins_interleaved = false,
31 const struct mb_cfg *variant_memory_params(void)
33 return &ddr4_mem_config;
36 void variant_get_spd_info(struct mem_spd *spd_info)
38 const uint32_t id = board_id();
39 spd_info->topo = MEM_TOPO_DIMM_MODULE;
41 if (id >= 2) {
42 spd_info->smbus[0].addr_dimm[0] = 0x50;
43 spd_info->smbus[1].addr_dimm[0] = 0x52;
44 } else {
45 spd_info->smbus[0].addr_dimm[0] = 0x52;
46 spd_info->smbus[1].addr_dimm[0] = 0x50;