cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / intel / dq67sw / early_init.c
blob14317a69e0b6068a25f1a678347c664a13b49493
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
4 #include <southbridge/intel/bd82x6x/pch.h>
5 #include <superio/winbond/w83667hg-a/w83667hg-a.h>
6 #include <superio/winbond/common/winbond.h>
8 #define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
10 const struct southbridge_usb_port mainboard_usb_ports[] = {
11 { 1, 1, 0 },
12 { 1, 1, 0 },
13 { 1, 1, 1 },
14 { 1, 1, 1 },
15 { 1, 0, 2 },
16 { 1, 0, 2 },
17 { 1, 0, 3 },
18 { 1, 0, 3 },
19 { 1, 1, 4 },
20 { 1, 1, 4 },
21 { 0, 0, 5 },
22 { 0, 0, 5 },
23 { 1, 0, 6 },
24 { 1, 0, 6 },
27 void bootblock_mainboard_early_init(void)
29 winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);