soc/intel/xeon_sp/util: Enhance lock_pam0123
[coreboot2.git] / payloads / libpayload / arch / arm / exception.c
blobd2b8ced97836e2f9c4c15b3e160d860580dc6c8d
1 /*
3 * Copyright 2013 Google Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
29 #include <arch/cache.h>
30 #include <arch/exception.h>
31 #include <exception.h>
32 #include <libpayload.h>
33 #include <stdint.h>
35 u32 exception_stack[0x400] __attribute__((aligned(8)));
36 struct exception_state exception_state;
38 static exception_hook hook;
39 static const char *names[EXC_COUNT] = {
40 [EXC_UNDEF] = "Undefined Instruction",
41 [EXC_SWI] = "Software Interrupt",
42 [EXC_PABORT] = "Prefetch Abort",
43 [EXC_DABORT] = "Data Abort",
44 [EXC_IRQ] = "Interrupt",
45 [EXC_FIQ] = "Fast Interrupt",
48 static void dump_stack(uintptr_t addr, size_t bytes)
50 int i, j;
51 const int line = 8;
52 uint32_t *ptr = (uint32_t *)(addr & ~(line * sizeof(*ptr) - 1));
54 printf("Dumping stack:\n");
55 for (i = bytes / sizeof(*ptr); i >= 0; i -= line) {
56 printf("%p: ", ptr + i);
57 for (j = i; j < i + line; j++)
58 printf("%08x ", *(ptr + j));
59 printf("\n");
63 static void print_regs(void)
65 int i;
67 for (i = 0; i < 16; i++) {
68 if (i == 15)
69 printf("PC");
70 else if (i == 14)
71 printf("LR");
72 else if (i == 13)
73 printf("SP");
74 else if (i == 12)
75 printf("IP");
76 else
77 printf("R%d", i);
78 printf(" = 0x%08x\n", exception_state.regs[i]);
80 printf("CPSR = 0x%08x\n", exception_state.cpsr);
83 void exception_dispatch(u32 idx)
85 die_if(idx >= EXC_COUNT || !names[idx], "Bad exception index %u!", idx);
87 if (hook && hook(idx))
88 return;
90 printf("%s Exception\n", names[idx]);
91 print_regs();
92 switch (idx) {
93 case EXC_PABORT:
94 printf("IFAR = %#.8x\n", read_ifar());
95 printf("IFSR = %#.8x\n", read_ifsr());
96 printf("AIFSR = %#.8x\n", read_aifsr());
97 break;
98 case EXC_DABORT:
99 printf("DFAR = %#.8x\n", read_dfar());
100 printf("DFSR = %#.8x\n", read_dfsr());
101 printf("ADFSR = %#.8x\n", read_adfsr());
102 break;
104 dump_stack(exception_state.regs[13], 512);
105 halt();
108 void exception_init(void)
110 uint32_t sctlr = read_sctlr();
111 /* Handle exceptions in ARM mode. */
112 sctlr &= ~SCTLR_TE;
113 /* Set V=0 in SCTLR so VBAR points to the exception vector table. */
114 sctlr &= ~SCTLR_V;
115 write_sctlr(sctlr);
117 extern uint32_t exception_table[];
118 set_vbar((uintptr_t)exception_table);
120 exception_stack_end = exception_stack + ARRAY_SIZE(exception_stack);
121 exception_state_ptr = &exception_state;
124 void exception_install_hook(exception_hook h)
126 die_if(hook, "Implement support for a list of hooks if you need it.");
127 hook = h;