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HEAD
mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git]
/
src
/
mainboard
/
bytedance
/
bd_egs
/
board.fmd
blob
1a58bb196b048c775f3e9659ad7729c8652c8ffb
1
FLASH@0xfc000000 64M {
2
SI_ALL@0x0 0x03000000 {
3
SI_DESC@0x0 0x1000
4
SI_GBE@0x1000 0x2000
5
SI_ME@0x3000 0x2fed000
6
SI_PT@0x2ff0000 0x10000
7
}
8
RW_MRC_CACHE@0x3000000 0x18000
9
FMAP 0x1000
10
RW_VPD(PRESERVE) 0x4000
11
RO_VPD(PRESERVE) 0x4000
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COREBOOT(CBFS)
13
}