mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3

[coreboot2.git] / src / mainboard / framework / azalea / devicetree.cb

# SPDX-License-Identifier: GPL-2.0-only

chip soc/amd/phoenix

        device domain 0 on
        end # domain

end     # chip soc/amd/phoenix