mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / framework / azalea / mainboard.c
blob77df1af0225b946f64d6caea98be56fcfebf26c6
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <amdblocks/amd_pci_util.h>
4 #include <device/device.h>
6 /*
7 * This controls the device -> IRQ routing.
9 */
10 static const struct fch_irq_routing fch_irq_map[] = {
13 const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length)
15 *length = ARRAY_SIZE(fch_irq_map);
16 return fch_irq_map;
19 static void mainboard_init(void *chip_info)
23 static void mainboard_enable(struct device *dev)
27 struct chip_operations mainboard_ops = {
28 .init = mainboard_init,
29 .enable_dev = mainboard_enable,