mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / fatcat / mainboard.c
blob0d1fcd3c66f126bfbd717fdad955fbef64e7519e
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <acpi/acpi.h>
4 #include <acpi/acpigen.h>
5 #include <baseboard/gpio.h>
6 #include <baseboard/variants.h>
7 #include <device/device.h>
8 #include <ec/ec.h>
9 #include <soc/ramstage.h>
10 #include <stdio.h>
11 #include <stdlib.h>
12 #include <vendorcode/google/chromeos/chromeos.h>
14 void __weak fw_config_gpio_padbased_override(struct pad_config *padbased_table)
16 /* default implementation does nothing */
19 void mainboard_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
21 variant_update_soc_chip_config(config);
24 void __weak variant_update_soc_chip_config(struct soc_intel_pantherlake_config *config)
26 /* default implementation does nothing */
29 static void mainboard_init(void *chip_info)
31 struct pad_config *padbased_table;
32 const struct pad_config *base_pads;
33 size_t base_num;
35 padbased_table = new_padbased_table();
36 base_pads = variant_gpio_table(&base_num);
37 gpio_padbased_override(padbased_table, base_pads, base_num);
38 fw_config_gpio_padbased_override(padbased_table);
39 gpio_configure_pads_with_padbased(padbased_table);
40 free(padbased_table);
41 baseboard_devtree_update();
44 void __weak baseboard_devtree_update(void)
46 /* Override dev tree settings per baseboard */
49 void __weak variant_generate_s0ix_hook(enum s0ix_entry entry)
51 /* Add board-specific MS0X entries */
53 if (s0ix_entry == S0IX_ENTRY) {
54 implement variant operations here
56 if (s0ix_entry == S0IX_EXIT) {
57 implement variant operations here
62 static void mainboard_dev_init(struct device *dev)
64 mainboard_ec_init();
67 static void mainboard_enable(struct device *dev)
69 dev->ops->init = mainboard_dev_init;
72 struct chip_operations mainboard_ops = {
73 .init = mainboard_init,
74 .enable_dev = mainboard_enable,