mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / fatcat / smihandler.c
blob9208d5161342c660844558a713a76003cfe26339
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <cpu/x86/smm.h>
4 #include <ec/google/chromeec/ec.h>
5 #include <ec/google/chromeec/smm.h>
6 #include <elog.h>
7 #include <intelblocks/smihandler.h>
8 #include <variant/ec.h>
10 void mainboard_smi_sleep(u8 slp_typ)
12 chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
15 int mainboard_smi_apmc(u8 apmc)
17 chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
18 return 0;
21 void elog_gsmi_cb_mainboard_log_wake_source(void)
23 google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS);
26 void mainboard_smi_espi_handler(void)
28 chromeec_smi_process_events();