1 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <bootblock_common.h>
6 #include <device/mmio.h>
8 #include <soc/mt6391.h>
9 #include <soc/pericfg.h>
14 static void i2c_set_gpio_pinmux(void)
16 gpio_set_mode(GPIO(SDA1
), PAD_SDA1_FUNC_SDA1
);
17 gpio_set_mode(GPIO(SCL1
), PAD_SCL1_FUNC_SCL1
);
18 gpio_set_mode(GPIO(SDA4
), PAD_SDA4_FUNC_SDA4
);
19 gpio_set_mode(GPIO(SCL4
), PAD_SCL4_FUNC_SCL4
);
22 static void nor_set_gpio_pinmux(void)
24 /* Set driving strength of EINT4~EINT9 to 8mA
30 /* EINT4: 0x10005B20[14:13] */
31 clrsetbits16(&mtk_gpio
->drv_mode
[2].val
, 0xf << 12, 2 << 13);
32 /* EINT5~EINT9: 0x10005B30[2:1] */
33 clrsetbits16(&mtk_gpio
->drv_mode
[3].val
, 0xf << 0, 2 << 1);
35 gpio_set_pull(GPIO(EINT4
), GPIO_PULL_ENABLE
, GPIO_PULL_UP
);
36 gpio_set_pull(GPIO(EINT5
), GPIO_PULL_ENABLE
, GPIO_PULL_UP
);
37 gpio_set_pull(GPIO(EINT6
), GPIO_PULL_ENABLE
, GPIO_PULL_UP
);
38 gpio_set_pull(GPIO(EINT7
), GPIO_PULL_ENABLE
, GPIO_PULL_UP
);
39 gpio_set_pull(GPIO(EINT8
), GPIO_PULL_ENABLE
, GPIO_PULL_UP
);
40 gpio_set_pull(GPIO(EINT9
), GPIO_PULL_ENABLE
, GPIO_PULL_UP
);
42 gpio_set_mode(GPIO(EINT4
), PAD_EINT4_FUNC_SFWP_B
);
43 gpio_set_mode(GPIO(EINT5
), PAD_EINT5_FUNC_SFOUT
);
44 gpio_set_mode(GPIO(EINT6
), PAD_EINT6_FUNC_SFCS0
);
45 gpio_set_mode(GPIO(EINT7
), PAD_EINT7_FUNC_SFHOLD
);
46 gpio_set_mode(GPIO(EINT8
), PAD_EINT8_FUNC_SFIN
);
47 gpio_set_mode(GPIO(EINT9
), PAD_EINT9_FUNC_SFCK
);
50 void bootblock_mainboard_early_init(void)
52 /* Clear UART0 power down signal */
53 clrbits32(&mt8173_pericfg
->pdn0_set
, PERICFG_UART0_PDN
);
56 void bootblock_mainboard_init(void)
58 /* adjust gpio params when external voltage is 1.8V */
59 gpio_init(GPIO_EINT_1P8V
);
61 /* set i2c related gpio */
62 i2c_set_gpio_pinmux();
64 /* set nor related GPIO */
65 nor_set_gpio_pinmux();
67 /* SPI_LEVEL_ENABLE: Enable 1.8V to 3.3V level shifter for EC SPI bus */
68 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT
> 4 &&
69 board_id() + CONFIG_BOARD_ID_ADJUSTMENT
< 8)
70 gpio_output(GPIO(SRCLKENAI2
), 1);
72 /* Init i2c bus 2 Timing register for TPM */
73 mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS
);
75 mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS
, SPI_PAD1_MASK
, 6*MHz
,
78 setup_chromeos_gpios();
80 if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT
< 4)
81 mt6391_enable_reset_when_ap_resets();