mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / zork / chromeos.c
blob8c579c34b820e32282b858b2c1c6ed1d24451ca8
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <bootmode.h>
4 #include <boot/coreboot_tables.h>
5 #include <gpio.h>
6 #include <variant/gpio.h>
7 #include <types.h>
8 #include <vendorcode/google/chromeos/chromeos.h>
10 void fill_lb_gpios(struct lb_gpios *gpios)
12 struct lb_gpio chromeos_gpios[] = {
13 {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
14 {-1, ACTIVE_HIGH, 0, "power"},
15 {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW),
16 "EC in RW"},
18 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
21 int get_write_protect_state(void)
23 /* Write protect on zork is active low, so invert it here */
24 return !gpio_get(CROS_WP_GPIO);
27 static const struct cros_gpio cros_gpios[] = {
28 CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, GPIO_DEVICE_NAME),
29 CROS_GPIO_WP_AL(CROS_WP_GPIO, GPIO_DEVICE_NAME),
31 DECLARE_CROS_GPIOS(cros_gpios);
33 int get_ec_is_trusted(void)
35 /* EC is trusted if not in RW. */
36 return !gpio_get(GPIO_EC_IN_RW);