mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / google / zork / variants / gumboz / gpio.c
blob100c480a0d3e1024859571abda7660136e875e65
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <gpio.h>
7 static const struct soc_amd_gpio dirinboz_gpio_set_stage_ram[] = {
8 /* PEN_DETECT_ODL - no used */
9 PAD_NC(GPIO_4),
10 /* PEN_POWER_EN - no used */
11 PAD_NC(GPIO_5),
14 const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
16 *size = ARRAY_SIZE(dirinboz_gpio_set_stage_ram);
17 return dirinboz_gpio_set_stage_ram;