src/mainboard/hp/280_g2/devicetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/skylake
   4         register "SerialIoDevMode" = "{
   5                 [PchSerialIoIndexUart2] = PchSerialIoSkipInit,  /* Routed to debug header */
   6         }"
   7
   8         register "eist_enable" = "true"
   9
  10         device domain 0 on
  11                 subsystemid 0x103c 0x2b5e inherit
  12                 device ref peg0         on      end
  13                 device ref igpu         on      end
  14                 device ref sa_thermal   on      end
  15                 device ref gmm          on      end
  16                 device ref south_xhci   on
  17                         register "usb2_ports" = "{
  18                                 [0]  = USB2_PORT_MID(OC0),
  19                                 [1]  = USB2_PORT_MID(OC0),
  20                                 [2]  = USB2_PORT_MID(OC4),
  21                                 [3]  = USB2_PORT_MID(OC4),
  22                                 [4]  = USB2_PORT_MID(OC2),
  23                                 [5]  = USB2_PORT_MID(OC2),
  24                                 [6]  = USB2_PORT_MID(OC0),
  25                                 [7]  = USB2_PORT_MID(OC0),
  26                                 [8]  = USB2_PORT_MID(OC0),
  27                                 [9]  = USB2_PORT_MID(OC0),
  28                                 [10] = USB2_PORT_MID(OC1),
  29                                 [11] = USB2_PORT_MID(OC1),
  30                                 [12] = USB2_PORT_MID(OC_SKIP),
  31                                 [13] = USB2_PORT_MID(OC_SKIP),
  32                         }"
  33                         register "usb3_ports" = "{
  34                                 [0] = USB3_PORT_DEFAULT(OC0),
  35                                 [1] = USB3_PORT_DEFAULT(OC0),
  36                                 [2] = USB3_PORT_DEFAULT(OC3),
  37                                 [3] = USB3_PORT_DEFAULT(OC3),
  38                                 [4] = USB3_PORT_DEFAULT(OC1),
  39                                 [5] = USB3_PORT_DEFAULT(OC1),
  40                                 [6] = USB3_PORT_DEFAULT(OC_SKIP),
  41                                 [7] = USB3_PORT_DEFAULT(OC_SKIP),
  42                                 [8] = USB3_PORT_DEFAULT(OC_SKIP),
  43                                 [9] = USB3_PORT_DEFAULT(OC_SKIP),
  44                         }"
  45                 end
  46                 device ref thermal      on      end
  47                 device ref heci1        on      end
  48                 device ref sata         on
  49                         register "SataSalpSupport" = "1"
  50                         register "SataPortsEnable" = "{
  51                                 [0] = 1,
  52                                 [1] = 1,
  53                                 [2] = 1,
  54                                 [3] = 1,
  55                         }"
  56                         register "SataPortsHotPlug" = "{
  57                                 [0] = 1,
  58                                 [1] = 1,
  59                                 [2] = 1,
  60                                 [3] = 1,
  61                         }"
  62                         # DevSlp not supported
  63                 end
  64                 device ref uart2        on      end
  65                 device ref pcie_rp5     on
  66                         # IT8893E PCI Bridge
  67                         register "PcieRpEnable[4]"                      = "1"
  68                         register "PcieRpLtrEnable[4]"                   = "1"
  69                         register "PcieRpAdvancedErrorReporting[4]"      = "1"
  70                         register "PcieRpClkSrcNumber[4]"                = "11"
  71                 end
  72                 device ref pcie_rp6     on
  73                         # PCIe x1 slot
  74                         register "PcieRpEnable[5]"                      = "1"
  75                         register "PcieRpHotPlug[5]"                     = "1"
  76                         register "PcieRpLtrEnable[5]"                   = "1"
  77                         register "PcieRpAdvancedErrorReporting[5]"      = "1"
  78                         register "PcieRpClkSrcNumber[5]"                = "6"
  79                 end
  80                 device ref pcie_rp7     on
  81                         # RTL8111 GbE NIC
  82                         register "PcieRpEnable[6]"                      = "1"
  83                         register "PcieRpLtrEnable[6]"                   = "1"
  84                         register "PcieRpAdvancedErrorReporting[6]"      = "1"
  85                         register "PcieRpClkSrcNumber[6]"                = "10"
  86                 end
  87                 device ref pcie_rp8     on
  88                         # M.2 2230 slot
  89                         register "PcieRpEnable[7]"                      = "1"
  90                         register "PcieRpHotPlug[7]"                     = "1"
  91                         register "PcieRpLtrEnable[7]"                   = "1"
  92                         register "PcieRpAdvancedErrorReporting[7]"      = "1"
  93                         register "PcieRpClkSrcNumber[7]"                = "12"
  94                 end
  95                 device ref lpc_espi     on
  96                         register "serirq_mode" = "SERIRQ_CONTINUOUS"
  97
  98                         # FIXME: Missing Super I/O HWM config
  99                         register "gen1_dec" = "0x000c0291"
 100                 end
 101                 device ref pmc          on
 102                         register "PmConfigSlpS3MinAssert"       = "SLP_S3_MIN_ASSERT_50MS"
 103                         register "PmConfigSlpS4MinAssert"       = "SLP_S4_MIN_ASSERT_4S"
 104                         register "PmConfigSlpSusMinAssert"      = "SLP_SUS_MIN_ASSERT_4S"
 105                         register "PmConfigSlpAMinAssert"        = "SLP_A_MIN_ASSERT_2S"
 106                         register "PmConfigPwrCycDur"            = "RESET_POWER_CYCLE_4S"
 107                 end
 108                 device ref hda          on      end
 109                 device ref smbus        on      end
 110                 device ref fast_spi     on      end
 111                 device ref tracehub     on
 112                         register "TraceHubMemReg0Size" = "2"
 113                         register "TraceHubMemReg1Size" = "2"
 114                 end
 115         end
 116 end