src/mainboard/lenovo/m920q/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <mainboard/gpio.h>
   4 #include <soc/gpio.h>
   5
   6 /* Pad configuration was generated automatically using intelp2m utility */
   7 static const struct pad_config gpio_table[] = {
   8
   9         /* ------- GPIO Community 0 ------- */
  10
  11         /* ------- GPIO Group GPP_A ------- */
  12         PAD_NC(GPP_A0, NONE),
  13         PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF3),  /* ESPI_IO0 */
  14         PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF3),  /* ESPI_IO1 */
  15         PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF3),  /* ESPI_IO2 */
  16         PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF3),  /* ESPI_IO3 */
  17         PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF3),  /* ESPI_CS0# */
  18         PAD_NC(GPP_A6, NONE),
  19         PAD_NC(GPP_A7, NONE),
  20         PAD_NC(GPP_A8, NONE),
  21         PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF3),  /* ESPI_CLK */
  22         PAD_NC(GPP_A10, NONE),
  23         PAD_NC(GPP_A11, NONE),
  24         PAD_NC(GPP_A12, NONE),
  25         PAD_NC(GPP_A13, NONE),
  26         PAD_CFG_NF(GPP_A14, NONE, DEEP, NF3),   /* ESPI_RESET# */
  27         PAD_NC(GPP_A15, NONE),
  28         PAD_NC(GPP_A16, NONE),
  29         PAD_NC(GPP_A17, NONE),
  30         PAD_NC(GPP_A18, NONE),
  31         PAD_NC(GPP_A19, NONE),
  32         PAD_NC(GPP_A20, NONE),
  33         PAD_NC(GPP_A21, NONE),
  34         PAD_NC(GPP_A22, NONE),
  35         PAD_NC(GPP_A23, NONE),
  36
  37         /* ------- GPIO Group GPP_B ------- */
  38         PAD_NC(GPP_B0, NONE),
  39         PAD_NC(GPP_B1, NONE),
  40         PAD_NC(GPP_B2, NONE),
  41         PAD_NC(GPP_B3, NONE),
  42         PAD_NC(GPP_B4, NONE),
  43         PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),    /* SRCCLKREQ0# */
  44         PAD_CFG_NF(GPP_B6, NONE, PLTRST, NF1),  /* SRCCLKREQ1# */
  45         PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),    /* SRCCLKREQ2# */
  46         PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),    /* SRCCLKREQ3# */
  47         PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),    /* SRCCLKREQ4# */
  48         PAD_NC(GPP_B10, NONE),
  49         PAD_NC(GPP_B11, NONE),
  50         PAD_CFG_NF(GPP_B12, NONE, PLTRST, NF1), /* SLP_S0# */
  51         PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),   /* PLTRST# */
  52         PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1),       /* SPKR */
  53         PAD_CFG_GPI_TRIG_OWN(GPP_B15, NONE, PLTRST, OFF, ACPI),
  54         PAD_NC(GPP_B16, NONE),
  55         PAD_NC(GPP_B17, NONE),
  56         PAD_CFG_GPO(GPP_B18, 0, DEEP),
  57         PAD_NC(GPP_B19, NONE),
  58         PAD_NC(GPP_B20, NONE),
  59         PAD_NC(GPP_B21, NONE),
  60         PAD_CFG_GPO(GPP_B22, 0, DEEP),
  61         PAD_CFG_GPO(GPP_B23, 0, DEEP),
  62
  63         /* ------- GPIO Community 1 ------- */
  64
  65         /* ------- GPIO Group GPP_C ------- */
  66         PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),    /* SMBCLK */
  67         PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),    /* SMBDATA */
  68         PAD_CFG_GPO(GPP_C2, 0, DEEP),
  69         PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),    /* SML0CLK */
  70         PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),    /* SML0DATA */
  71         PAD_CFG_GPO(GPP_C5, 0, DEEP),
  72         /* GPP_C6 - RESERVED */
  73         /* GPP_C7 - RESERVED */
  74         PAD_CFG_GPI_APIC(GPP_C8, NONE, PLTRST, LEVEL, NONE),
  75         PAD_CFG_GPI_TRIG_OWN(GPP_C9, NONE, PLTRST, OFF, ACPI),
  76         PAD_NC(GPP_C10, NONE),
  77         PAD_NC(GPP_C11, NONE),
  78         PAD_NC(GPP_C12, NONE),
  79         PAD_NC(GPP_C13, NONE),
  80         PAD_NC(GPP_C14, NONE),
  81         PAD_NC(GPP_C15, NONE),
  82         PAD_NC(GPP_C16, NONE),
  83         PAD_NC(GPP_C17, NONE),
  84         PAD_NC(GPP_C18, NONE),
  85         PAD_NC(GPP_C19, NONE),
  86         PAD_NC(GPP_C20, NONE),
  87         PAD_NC(GPP_C21, NONE),
  88         PAD_NC(GPP_C22, NONE),
  89         PAD_NC(GPP_C23, NONE),
  90
  91         /* ------- GPIO Group GPP_D ------- */
  92         PAD_NC(GPP_D0, NONE),
  93         PAD_CFG_GPO(GPP_D1, 1, PLTRST),
  94         PAD_NC(GPP_D2, NONE),
  95         PAD_NC(GPP_D3, NONE),
  96         PAD_NC(GPP_D4, NONE),
  97         PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),    /* CNV_RF_RESET# */
  98         PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),    /* MODEM_CLKREQ */
  99         PAD_NC(GPP_D7, NONE),
 100         PAD_NC(GPP_D8, NONE),
 101         PAD_NC(GPP_D9, NONE),
 102         PAD_NC(GPP_D10, NONE),
 103         PAD_CFG_GPI_TRIG_OWN(GPP_D11, NONE, PLTRST, OFF, ACPI),
 104         PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2),   /* GP_BSSB_DI */
 105         PAD_NC(GPP_D13, NONE),
 106         PAD_NC(GPP_D14, NONE),
 107         PAD_NC(GPP_D15, NONE),
 108         PAD_NC(GPP_D16, NONE),
 109         PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),   /* DMIC_CLK1 */
 110         PAD_CFG_NF(GPP_D18, NONE, PLTRST, NF1), /* DMIC_DATA1 */
 111         PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),   /* DMIC_CLK0 */
 112         PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),   /* DMIC_DATA0 */
 113         PAD_NC(GPP_D21, NONE),
 114         PAD_NC(GPP_D22, NONE),
 115         PAD_NC(GPP_D23, NONE),
 116
 117         /* ------- GPIO Group GPP_G ------- */
 118         PAD_NC(GPP_G0, NONE),
 119         PAD_NC(GPP_G1, NONE),
 120         PAD_NC(GPP_G2, NONE),
 121         PAD_NC(GPP_G3, NONE),
 122         PAD_NC(GPP_G4, NONE),
 123         PAD_NC(GPP_G5, NONE),
 124         PAD_NC(GPP_G6, NONE),
 125         PAD_NC(GPP_G7, NONE),
 126
 127         /* ------- GPIO Community 2 ------- */
 128
 129         /* ------- GPIO Group GPD ------- */
 130         PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),    /* BATLOW# */
 131         PAD_CFG_GPI_TRIG_OWN(GPD1, UP_20K, RSMRST, OFF, ACPI),
 132         PAD_CFG_GPI_TRIG_OWN(GPD2, NONE, PLTRST, OFF, ACPI),
 133         PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),  /* PRWBTN# */
 134         PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),    /* SLP_S3# */
 135         PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),    /* SLP_S4# */
 136         PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),    /* SLP_A# */
 137         PAD_CFG_GPO(GPD7, 0, RSMRST),
 138         PAD_CFG_NF(GPD8, NONE, RSMRST, NF1),    /* SUSCLK */
 139         PAD_CFG_NF(GPD9, NONE, RSMRST, NF1),    /* SLP_WLAN# */
 140         PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),   /* SLP_S5# */
 141         PAD_CFG_NF(GPD11, NONE, RSMRST, NF1),   /* LANPHYPC */
 142
 143         /* ------- GPIO Community 3 ------- */
 144
 145         /* ------- GPIO Group GPP_K ------- */
 146         PAD_NC(GPP_K0, NONE),
 147         PAD_NC(GPP_K1, NONE),
 148         PAD_NC(GPP_K2, NONE),
 149         PAD_NC(GPP_K3, NONE),
 150         PAD_CFG_GPI_TRIG_OWN(GPP_K4, NONE, DEEP, OFF, ACPI),
 151         PAD_CFG_GPI_TRIG_OWN(GPP_K5, NONE, DEEP, OFF, ACPI),
 152         PAD_CFG_GPI_TRIG_OWN(GPP_K6, NONE, DEEP, OFF, ACPI),
 153         PAD_CFG_GPI_TRIG_OWN(GPP_K7, NONE, DEEP, OFF, ACPI),
 154         PAD_CFG_GPI_TRIG_OWN(GPP_K8, NONE, DEEP, OFF, ACPI),
 155         PAD_CFG_GPI_TRIG_OWN(GPP_K9, NONE, DEEP, OFF, ACPI),
 156         PAD_CFG_GPI_TRIG_OWN(GPP_K10, NONE, DEEP, OFF, ACPI),
 157         PAD_CFG_NF(GPP_K11, NONE, DEEP, NF1),   /* Reserved */
 158         PAD_CFG_GPI_SCI(GPP_K12, NONE, PLTRST, LEVEL, INVERT),
 159         PAD_NC(GPP_K13, NONE),
 160         PAD_NC(GPP_K14, NONE),
 161         PAD_NC(GPP_K15, NONE),
 162         PAD_CFG_GPO(GPP_K16, 0, PLTRST),
 163         PAD_NC(GPP_K17, NONE),
 164         PAD_NC(GPP_K18, NONE),
 165         PAD_NC(GPP_K19, NONE),
 166         PAD_CFG_NF(GPP_K20, NONE, DEEP, NF1),   /* Reserved */
 167         PAD_CFG_GPI_TRIG_OWN(GPP_K21, NONE, PLTRST, OFF, ACPI),
 168         PAD_CFG_GPO(GPP_K22, 1, PLTRST),
 169         PAD_NC(GPP_K23, NONE),
 170
 171         /* ------- GPIO Group GPP_H ------- */
 172         PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),    /* SRCCLKREQ6# */
 173         PAD_NC(GPP_H1, NONE),
 174         PAD_NC(GPP_H2, NONE),
 175         PAD_NC(GPP_H3, NONE),
 176         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),    /* SRCCLKREQ10# */
 177         PAD_NC(GPP_H5, NONE),
 178         PAD_NC(GPP_H6, NONE),
 179         PAD_NC(GPP_H7, NONE),
 180         PAD_NC(GPP_H8, NONE),
 181         PAD_NC(GPP_H9, NONE),
 182         PAD_NC(GPP_H10, NONE),
 183         PAD_NC(GPP_H11, NONE),
 184         PAD_CFG_GPO(GPP_H12, 0, DEEP),
 185         PAD_NC(GPP_H13, NONE),
 186         PAD_CFG_GPO(GPP_H14, 0, PLTRST),
 187         PAD_NC(GPP_H15, NONE),
 188         PAD_CFG_GPO(GPP_H16, 0, PLTRST),
 189         PAD_CFG_GPO(GPP_H17, 0, PLTRST),
 190         PAD_CFG_GPO(GPP_H18, 0, PLTRST),
 191         PAD_NC(GPP_H19, NONE),
 192         PAD_NC(GPP_H20, NONE),
 193         PAD_CFG_GPI_TRIG_OWN(GPP_H21, NONE, PLTRST, OFF, ACPI),
 194         PAD_NC(GPP_H22, NONE),
 195         PAD_NC(GPP_H23, NONE),
 196
 197         /* ------- GPIO Group GPP_E ------- */
 198         PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1),    /* SATAXPCIE0 */
 199         PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),    /* SATAXPCIE1 */
 200         PAD_CFG_GPI_SCI(GPP_E2, NONE, PLTRST, LEVEL, NONE),
 201         PAD_NC(GPP_E3, NONE),
 202         PAD_NC(GPP_E4, NONE),
 203         PAD_NC(GPP_E5, NONE),
 204         PAD_CFG_GPO(GPP_E6, 0, PLTRST),
 205         PAD_NC(GPP_E7, NONE),
 206         PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),  /* SATALED# */
 207         PAD_CFG_NF(GPP_E9, NONE, PLTRST, NF1),  /* USB2_OC0# */
 208         PAD_CFG_NF(GPP_E10, NONE, PLTRST, NF1), /* USB2_OC1# */
 209         PAD_CFG_NF(GPP_E11, NONE, PLTRST, NF1), /* USB2_OC2# */
 210         PAD_CFG_NF(GPP_E12, NONE, PLTRST, NF1), /* USB2_OC3# */
 211
 212         /* ------- GPIO Group GPP_F ------- */
 213         PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),    /* SATAXPCIE3 */
 214         PAD_CFG_NF(GPP_F1, NONE, PLTRST, NF1),  /* SATAXPCIE4 */
 215         PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),    /* SATAXPCIE5 */
 216         PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1),    /* SATAXPCIE6 */
 217         PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),    /* SATAXPCIE7 */
 218         PAD_NC(GPP_F5, NONE),
 219         PAD_NC(GPP_F6, NONE),
 220         PAD_NC(GPP_F7, NONE),
 221         PAD_NC(GPP_F8, NONE),
 222         PAD_NC(GPP_F9, NONE),
 223         PAD_NC(GPP_F10, NONE),
 224         PAD_NC(GPP_F11, NONE),
 225         PAD_NC(GPP_F12, NONE),
 226         PAD_NC(GPP_F13, NONE),
 227         PAD_CFG_NF(GPP_F14, NONE, DEEP, NF2),   /* PS_ON# */
 228         PAD_CFG_NF(GPP_F15, NONE, PLTRST, NF1), /* USB2_OC4# */
 229         PAD_CFG_NF(GPP_F16, NONE, PLTRST, NF1), /* USB2_OC5# */
 230         PAD_CFG_NF(GPP_F17, NONE, PLTRST, NF1), /* USB2_OC6# */
 231         PAD_NC(GPP_F18, NONE),
 232         PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),   /* eDP_VDDEN */
 233         PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),   /* eDP_BKLTEN */
 234         PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),   /* eDP_BKLTCTL */
 235         PAD_CFG_GPO(GPP_F22, 1, PLTRST),
 236         PAD_CFG_GPO(GPP_F23, 1, PLTRST),
 237
 238         /* ------- GPIO Community 4 ------- */
 239
 240         /* ------- GPIO Group GPP_I ------- */
 241         PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1),    /* DDPB_HPD0 */
 242         PAD_CFG_NF(GPP_I1, NONE, DEEP, NF1),    /* DDPB_HPD1 */
 243         PAD_CFG_NF(GPP_I2, NONE, DEEP, NF1),    /* DDPB_HPD2 */
 244         PAD_NC(GPP_I3, NONE),
 245         PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),    /* EDP_HPD */
 246         PAD_CFG_NF(GPP_I5, NONE, DEEP, NF1),    /* DDPB_CTRLCLK */
 247         PAD_CFG_NF(GPP_I6, NONE, DEEP, NF1),    /* DDPB_CTRLDATA */
 248         PAD_CFG_NF(GPP_I7, NONE, DEEP, NF1),    /* DDPC_CTRLCLK */
 249         PAD_CFG_NF(GPP_I8, NONE, DEEP, NF1),    /* DDPC_CTRLDATA */
 250         PAD_CFG_NF(GPP_I9, NONE, DEEP, NF1),    /* DDPD_CTRLCLK */
 251         PAD_CFG_NF(GPP_I10, NONE, DEEP, NF1),   /* DDPD_CTRLDATA */
 252         PAD_NC(GPP_I11, NONE),
 253         PAD_NC(GPP_I12, NONE),
 254         PAD_NC(GPP_I13, NONE),
 255         PAD_NC(GPP_I14, NONE),
 256
 257         /* ------- GPIO Group GPP_J ------- */
 258         PAD_NC(GPP_J0, NONE),
 259         PAD_CFG_NF(GPP_J1, NONE, DEEP, NF2),    /* CPU_C10_GATE# */
 260         PAD_NC(GPP_J2, NONE),
 261         PAD_NC(GPP_J3, NONE),
 262         PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),    /* CNV_BRI_DT */
 263         PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),  /* CNV_BRI_RSP */
 264         PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),    /* CNV_RGI_DT */
 265         PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),  /* CNV_RGI_RSP */
 266         PAD_NC(GPP_J8, NONE),
 267         PAD_CFG_GPO(GPP_J9, 0, DEEP),
 268         PAD_NC(GPP_J10, NONE),
 269         PAD_CFG_NF(GPP_J11, DN_20K, DEEP, NF1), /* A4WP_PRESENT */
 270 };
 271
 272 void mainboard_configure_gpios(void)
 273 {
 274         gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 275 }