mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / lenovo / t420s / hda_verb.c
blobc4e77ea4600b27c594e7af892608719d079ff49a
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* Bits 31:28 - Codec Address */
4 /* Bits 27:20 - NID */
5 /* Bits 19:8 - Verb ID */
6 /* Bits 7:0 - Payload */
8 #include <device/azalia_device.h>
10 const u32 cim_verb_data[] = {
11 0x14f1506e, /* Codec VID / DID: Conexant CX20590 - schematic shows CX20672 */
12 0x17aa21d2, /* Subsystem ID */
13 13, /* Number of 4 dword sets */
14 AZALIA_SUBVENDOR(0, 0x17aa21d2),
15 AZALIA_PIN_CFG(0, 0x19, 0x04211040),
16 AZALIA_PIN_CFG(0, 0x1a, 0x61a19050),
17 AZALIA_PIN_CFG(0, 0x1b, 0x04a11060),
18 AZALIA_PIN_CFG(0, 0x1c, 0x6121401f),
19 AZALIA_PIN_CFG(0, 0x1d, 0x40f001f0),
20 AZALIA_PIN_CFG(0, 0x1e, 0x40f001f0),
21 AZALIA_PIN_CFG(0, 0x1f, 0x90170110),
22 AZALIA_PIN_CFG(0, 0x20, 0x40f001f0),
23 AZALIA_PIN_CFG(0, 0x22, 0x40f001f0),
24 AZALIA_PIN_CFG(0, 0x23, 0x90a60170),
26 /* Misc entries */
27 0x00b707C0, /* Enable PortB as Output with HP amp */
28 0x00d70740, /* Enable PortD as Output */
29 0x0017a200, /* Disable ClkEn of PortSenseTst */
30 0x0017c621, /* Slave Port - Port A used as microphone input for
31 combo Jack
32 Master Port - Port B used for Jack Presence Detect
33 Enable Combo Jack Detection */
34 0x0017a208, /* Enable ClkEn of PortSenseTst */
35 0x00170500, /* Set power state to D0 */
36 0x00170500, /* Padding */
37 0x00170500, /* Padding */
40 const u32 pc_beep_verbs[] = {
41 0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */
44 AZALIA_ARRAY_SIZES;