mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / libretrend / lt1000 / Kconfig
blobe0dd825c3b177a2c6e8714f083e50d976e18ec9b
1 ## SPDX-License-Identifier: GPL-2.0-only
3 if BOARD_LIBRETREND_LT1000
5 config BOARD_SPECIFIC_OPTIONS
6         def_bool y
7         select BOARD_ROMSIZE_KB_8192
8         select HAVE_ACPI_RESUME
9         select HAVE_ACPI_TABLES
10         select INTEL_GMA_HAVE_VBT
11         select MAINBOARD_HAS_LIBGFXINIT
12         select MEMORY_MAPPED_TPM
13         select SOC_INTEL_SKYLAKE
14         select SPD_READ_BY_WORD
15         select SUPERIO_ITE_IT8786E
17 config MAINBOARD_PART_NUMBER
18         default "LT1000"
20 config MAINBOARD_DIR
21         default "libretrend/lt1000"
23 config MAX_CPUS
24         int
25         default 4
27 config VGA_BIOS_ID
28         string
29         default "8086,1916"
31 config DIMM_MAX
32         default 2
34 config DIMM_SPD_SIZE
35         default 512
37 config CBFS_SIZE
38         default 0x600000
40 config USE_PM_ACPI_TIMER
41         default n
43 endif