src/mainboard/libretrend/lt1000/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <bootblock_common.h>
   4 #include <superio/ite/common/ite.h>
   5 #include <superio/ite/it8786e/it8786e.h>
   6
   7 #define GPIO_DEV        PNP_DEV(0x2e, IT8786E_GPIO)
   8 #define SERIAL1_DEV     PNP_DEV(0x2e, IT8786E_SP1)
   9 #define SERIAL3_DEV     PNP_DEV(0x2e, IT8786E_SP3)
  10 #define SERIAL4_DEV     PNP_DEV(0x2e, IT8786E_SP4)
  11 #define SERIAL5_DEV     PNP_DEV(0x2e, IT8786E_SP5)
  12 #define SERIAL6_DEV     PNP_DEV(0x2e, IT8786E_SP6)
  13
  14 void bootblock_mainboard_early_init(void)
  15 {
  16         ite_conf_clkin(GPIO_DEV, ITE_UART_CLK_PREDIVIDE_24);
  17         ite_enable_3vsbsw(GPIO_DEV);
  18         ite_kill_watchdog(GPIO_DEV);
  19         ite_enable_serial(SERIAL1_DEV, CONFIG_TTYS0_BASE);
  20
  21         /*
  22          * FIXME:
  23          * IT8786E has 6 COM ports, COM1/3/5 have default IO base 0x3f8 and
  24          * COM2/4/6 have 0x2f8. When enabling devices before setting resources
  25          * from devicetree, the output on debugging COM1 becomes very slow due
  26          * to the same IO bases for multiple COM ports. For now set different
  27          * hardcoded IO bases for COM3/4/5/6 ports, they will be set later to
  28          * desired values from devicetree. They can be also turned off.
  29          */
  30         ite_enable_serial(SERIAL3_DEV, 0x3e8);
  31         ite_enable_serial(SERIAL4_DEV, 0x2e8);
  32         ite_enable_serial(SERIAL5_DEV, 0x2f0);
  33         ite_enable_serial(SERIAL6_DEV, 0x2e0);
  34 }