mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / ocp / deltalake / ipmi.c
blobc3ba3546e2f8fbbcc86bc8dd8beada1bf3377996
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <console/console.h>
4 #include <drivers/ipmi/ipmi_if.h>
5 #include <drivers/ipmi/ipmi_ops.h>
6 #include <drivers/ipmi/ocp/ipmi_ocp.h>
7 #include <drivers/vpd/vpd.h>
8 #include <types.h>
10 #include "ipmi.h"
11 #include "vpd.h"
13 enum cb_err ipmi_get_pcie_config(uint8_t *pcie_config)
15 int ret;
16 struct ipmi_config_rsp {
17 struct ipmi_rsp resp;
18 uint8_t config;
19 } __packed;
20 struct ipmi_config_rsp rsp;
22 ret = ipmi_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
23 IPMI_OEM_GET_PCIE_CONFIG, NULL, 0, (unsigned char *)&rsp,
24 sizeof(rsp));
26 if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
27 printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
28 __func__, ret, rsp.resp.completion_code);
29 return CB_ERR;
31 *pcie_config = rsp.config;
33 return CB_SUCCESS;
36 enum cb_err ipmi_get_slot_id(uint8_t *slot_id)
38 int ret;
39 struct ipmi_config_rsp {
40 struct ipmi_rsp resp;
41 uint8_t board_sku_id;
42 uint8_t board_rev_id;
43 uint8_t slot_id;
44 uint8_t slot_config_id;
45 } __packed;
46 struct ipmi_config_rsp rsp;
48 ret = ipmi_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_GET_BOARD_ID,
49 NULL, 0, (unsigned char *)&rsp, sizeof(rsp));
51 if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
52 printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
53 __func__, ret, rsp.resp.completion_code);
54 return CB_ERR;
56 *slot_id = rsp.slot_id;
58 return CB_SUCCESS;
61 void init_frb2_wdt(void)
63 uint8_t enable;
64 int action, countdown;
66 if (vpd_get_bool(FRB2_TIMER, VPD_RW_THEN_RO, &enable)) {
67 printk(BIOS_DEBUG, "Got VPD %s value: %d\n", FRB2_TIMER, enable);
68 } else {
69 printk(BIOS_INFO, "Not able to get VPD %s, default set to %d\n", FRB2_TIMER,
70 FRB2_TIMER_DEFAULT);
71 enable = FRB2_TIMER_DEFAULT;
74 if (enable) {
75 if (vpd_get_int(FRB2_COUNTDOWN, VPD_RW_THEN_RO, &countdown)) {
76 printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d ms\n",
77 countdown * 100);
78 } else {
79 printk(BIOS_DEBUG, "FRB2 timer use default value: %d ms\n",
80 FRB2_COUNTDOWN_DEFAULT * 100);
81 countdown = FRB2_COUNTDOWN_DEFAULT;
84 if (vpd_get_int(FRB2_ACTION, VPD_RW_THEN_RO, &action)) {
85 printk(BIOS_DEBUG, "FRB2 timer action set to: %d\n", action);
86 } else {
87 printk(BIOS_DEBUG, "FRB2 timer action use default value: %d\n",
88 FRB2_ACTION_DEFAULT);
89 action = FRB2_ACTION_DEFAULT;
91 ipmi_init_and_start_bmc_wdt(CONFIG_BMC_KCS_BASE, (uint16_t)countdown,
92 (uint8_t)action);
93 } else {
94 printk(BIOS_DEBUG, "Disable FRB2 timer\n");
95 ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE);