mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / mainboard / protectli / vault_adl_p / board_beep.c
blob76cda264077b3be759a2f082583cebef03c22d22
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <arch/io.h>
4 #include <delay.h>
6 #include "board_beep.h"
8 #define ITE_GPIO_BASE 0xa00
9 #define ITE_GPIO_PIN(x) (1 << ((x) % 10))
10 #define ITE_GPIO_SET(x) (((x) / 10) - 1)
11 #define ITE_GPIO_IO_ADDR(x) (ITE_GPIO_BASE + ITE_GPIO_SET(x))
13 void do_beep(uint32_t frequency, uint32_t duration_msec)
15 uint32_t timer_delay = 1000000 / frequency / 2;
16 uint32_t count = (duration_msec * 1000) / (timer_delay * 2);
17 uint8_t val = inb(ITE_GPIO_IO_ADDR(41)); /* GP41 drives a MOSFET for PC Speaker */
19 for (uint32_t i = 0; i < count; i++) {
20 outb(val | ITE_GPIO_PIN(41), ITE_GPIO_IO_ADDR(41));
21 udelay(timer_delay);
22 outb(val & ~ITE_GPIO_PIN(41), ITE_GPIO_IO_ADDR(41));
23 udelay(timer_delay);