mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / southbridge / intel / i82801dx / fadt.c
blob0b21f8bda3ad2e21e3b498b671d66e9429787628
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <device/pci_ops.h>
6 void acpi_fill_fadt(acpi_fadt_t *fadt)
8 u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
11 fadt->pm1a_evt_blk = pmbase;
12 fadt->pm1a_cnt_blk = pmbase + 0x4;
13 fadt->pm_tmr_blk = pmbase + 0x8;
14 fadt->gpe0_blk = pmbase + 0x28;
16 fadt->pm1_evt_len = 4;
17 fadt->pm1_cnt_len = 2;
18 fadt->pm_tmr_len = 4;
19 fadt->gpe0_blk_len = 8;
21 fill_fadt_extended_pm_io(fadt);
23 fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
25 fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
26 ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;