src/southbridge/intel/i82801gx/smihandler.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <types.h>
   4 #include <console/console.h>
   5 #include <cpu/x86/smm.h>
   6 #include <device/pci_def.h>
   7 #include <soc/nvs.h>
   8 #include <southbridge/intel/common/pmutil.h>
   9 #include "i82801gx.h"
  10
  11 /* I945 */
  12 #define SMRAM           0x9d
  13 #define   D_OPEN        (1 << 6)
  14 #define   D_CLS         (1 << 5)
  15 #define   D_LCK         (1 << 4)
  16 #define   G_SMRANE      (1 << 3)
  17 #define   C_BASE_SEG    ((0 << 2) | (1 << 1) | (0 << 0))
  18
  19 /* While we read PMBASE dynamically in case it changed, let's initialize it with a sane value */
  20 u16 pmbase = DEFAULT_PMBASE;
  21
  22 void southbridge_smi_monitor(void)
  23 {
  24 #define IOTRAP(x) (trap_sts & (1 << x))
  25         u32 trap_sts, trap_cycle;
  26         u32 data, mask = 0;
  27         int i;
  28
  29         trap_sts = RCBA32(0x1e00); // TRSR - Trap Status Register
  30         RCBA32(0x1e00) = trap_sts; // Clear trap(s) in TRSR
  31
  32         trap_cycle = RCBA32(0x1e10);
  33         for (i = 16; i < 20; i++) {
  34                 if (trap_cycle & (1 << i))
  35                         mask |= (0xff << ((i - 16) << 3));
  36         }
  37
  38         /* IOTRAP(3) SMI function call */
  39         if (IOTRAP(3)) {
  40                 if (gnvs && gnvs->smif)
  41                         io_trap_handler(gnvs->smif); // call function smif
  42                 return;
  43         }
  44
  45         /* IOTRAP(2) currently unused
  46          * IOTRAP(1) currently unused */
  47
  48         /* IOTRAP(0) SMIC: currently unused  */
  49
  50         printk(BIOS_DEBUG, "  trapped io address = 0x%x\n", trap_cycle & 0xfffc);
  51         for (i = 0; i < 4; i++)
  52                 if (IOTRAP(i))
  53                         printk(BIOS_DEBUG, "  TRAP = %d\n", i);
  54         printk(BIOS_DEBUG, "  AHBE = %x\n", (trap_cycle >> 16) & 0xf);
  55         printk(BIOS_DEBUG, "  MASK = 0x%08x\n", mask);
  56         printk(BIOS_DEBUG, "  read/write: %s\n", (trap_cycle & (1 << 24)) ? "read" : "write");
  57
  58         if (!(trap_cycle & (1 << 24))) {
  59                 /* Write Cycle */
  60                 data = RCBA32(0x1e18);
  61                 printk(BIOS_DEBUG, "  iotrap written data = 0x%08x\n", data);
  62         }
  63 #undef IOTRAP
  64 }
  65
  66 void southbridge_finalize_all(void)
  67 {
  68 }