mb/google/nissa/var/rull: add ssd timing and modify ssd GPIO pins of rtd3
[coreboot2.git] / src / southbridge / intel / i82801gx / usb.c
blob4f3261f82504ec4b8dff89ffbccd1585b3667392
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ops.h>
7 #include <device/pci_ids.h>
8 #include "i82801gx.h"
10 static void usb_init(struct device *dev)
12 /* USB Specification says the device must be Bus Master */
13 printk(BIOS_DEBUG, "UHCI: Setting up controller.. ");
15 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
17 // Erratum
18 pci_write_config8(dev, 0xca, 0x00);
20 // Yes. Another Erratum
21 pci_or_config8(dev, 0xca, 1 << 0);
23 printk(BIOS_DEBUG, "done.\n");
26 static struct device_operations usb_ops = {
27 .read_resources = pci_dev_read_resources,
28 .set_resources = pci_dev_set_resources,
29 .enable_resources = pci_dev_enable_resources,
30 .init = usb_init,
31 .enable = i82801gx_enable,
32 .ops_pci = &pci_dev_ops_pci,
35 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
36 static const struct pci_driver i82801gb_usb1 __pci_driver = {
37 .ops = &usb_ops,
38 .vendor = PCI_VID_INTEL,
39 .device = 0x27c8,
42 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
43 static const struct pci_driver i82801gb_usb2 __pci_driver = {
44 .ops = &usb_ops,
45 .vendor = PCI_VID_INTEL,
46 .device = 0x27c9,
49 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
50 static const struct pci_driver i82801gb_usb3 __pci_driver = {
51 .ops = &usb_ops,
52 .vendor = PCI_VID_INTEL,
53 .device = 0x27ca,
56 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
57 static const struct pci_driver i82801gb_usb4 __pci_driver = {
58 .ops = &usb_ops,
59 .vendor = PCI_VID_INTEL,
60 .device = 0x27cb,