soc/intel/xeon_sp: Align resources to 4K
[coreboot2.git] / util / marvell / doimage_mv / doimage.h
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1 /*******************************************************************************
2 Copyright (C) Marvell International Ltd. and its affiliates
4 Marvell GPL License Option
6 If you received this File from Marvell, you may opt to use, redistribute and/or
7 modify this File in accordance with the terms and conditions of the General
8 Public License Version 2, June 1991 (the "GPL License"), a copy of which is
9 available along with the File in the license.txt file or by writing to the Free
10 Software Foundation, Inc.
12 THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
13 WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
14 DISCLAIMED. The GPL License provides additional details about this warranty
15 disclaimer.
17 *******************************************************************************/
18 #ifndef _INC_DOIMAGE_H
19 #define _INC_DOIMAGE_H
21 #include <sys/types.h>
22 #include <commonlib/bsd/helpers.h>
24 /* use the same version as in "bootrom.inc" file */
25 #define VERSION_NUMBER "2.20"
26 #define PRODUCT_SUPPORT "Marvell Armada-3xx series"
28 #define RSA_KEY_SIZE 2048
29 #define RSA_EXPONENT 65537
31 #define T_OPTION_MASK 0x1 /* image type */
32 #define D_OPTION_MASK 0x2 /* image destination */
33 #define E_OPTION_MASK 0x4 /* image execution address */
34 #define S_OPTION_MASK 0x8 /* starting sector */
35 #define R_OPTION_MASK 0x10 /* DRAM file */
36 #define C_OPTION_MASK 0x20 /* headers definition file */
37 #define P_OPTION_MASK 0x40 /* NAND Page size */
38 #define M_OPTION_MASK 0x80 /* TWSI serial init file */
39 #define W_OPTION_MASK 0x100 /* HEX file width */
40 #define H_OPTION_MASK 0x200 /* Header mode */
41 #define X_OPTION_MASK 0x400 /* Pre padding */
42 #define Y_OPTION_MASK 0x800 /* Post padding */
43 #define J_OPTION_MASK 0x1000 /* JTAG Enabled */
44 #define B_OPTION_MASK 0x2000 /* Box ID */
45 #define Z_OPTION_MASK 0x4000 /* secure boot mode - KAK private key */
46 #define F_OPTION_MASK 0x8000 /* Flash ID */
47 #define A_OPTION_MASK 0x10000 /* secure boot mode - CSK private key */
48 #define G_OPTION_MASK 0x20000 /* binary file */
49 #define K_OPTION_MASK 0x40000 /* secure boot mode - CSK private key index */
50 #define L_OPTION_MASK 0x80000 /* NAND block size (in 64K chunks) */
51 #define N_OPTION_MASK 0x100000 /* NAND cell technology MLC/SLC */
52 #define p_OPTION_MASK 0x200000 /* Print enable */
53 #define b_OPTION_MASK 0x400000 /* Baudrate */
54 #define u_OPTION_MASK 0x800000 /* debug serial port number */
55 #define m_OPTION_MASK 0x1000000 /* debug serial port MPP configuration */
57 #ifndef O_BINARY /* should be defined on __WIN32__ */
58 #define O_BINARY 0
59 #endif
61 typedef enum {
62 IMG_SATA,
63 IMG_UART,
64 IMG_FLASH,
65 IMG_MMC,
66 IMG_BOOTROM,
67 IMG_NAND,
68 IMG_HEX,
69 IMG_BIN,
70 IMG_PEX,
71 IMG_I2C
73 } IMG_TYPE;
75 #define REGULAR_IMAGE(opt) \
76 (((opt)->image_type != IMG_BOOTROM) && \
77 ((opt)->image_type != IMG_HEX) && ((opt)->image_type != IMG_BIN))
79 typedef struct {
80 IMG_TYPE img_type; /* image type */
81 char *img_name; /* image name string */
82 unsigned int img_opt; /* mandatory options for this image type */
84 } IMG_MAP;
86 typedef enum {
87 IMG_FILE_INDX = 1,
88 HDR_FILE_INDX = 2
90 } FILE_IDX;
92 typedef enum {
93 HDR_IMG_ONE_FILE = 1, /* Create one file with header and image */
94 HDR_IMG_TWO_FILES = 2, /* Create separate header and image files */
95 HDR_ONLY = 3, /* Create only header */
96 IMG_ONLY = 4, /* Create only image */
98 } HEADER_MODE;
100 typedef struct {
101 IMG_TYPE image_type;
102 char *fname_dram; /* DRAM init file for "register" header */
103 char *fname_twsi; /* TWSI serial init file */
104 char *fname_bin; /* binary code file for "binary" header */
105 char *fname_prkey; /* KAK RSA Private key file */
106 char *fname_prkeyCsk; /* CSK RSA Private key file */
107 char *fname_list; /* headers definition file */
108 u32 flags; /* user-defined flags */
109 u32 req_flags; /* mandatory flags */
110 u32 image_source; /* starting sector */
111 u32 image_dest; /* image destination */
112 u32 image_exec; /* image execution */
113 unsigned int hex_width; /* HEX file width */
114 unsigned int header_mode; /* Header file mode */
115 int csk_index;
116 int pre_padding;
117 int post_padding;
118 int prepadding_size;
119 int postpadding_size;
120 unsigned int bytesToAlign;
121 unsigned int nandPageSize;
122 unsigned int nandBlkSize;
123 char nandCellTech;
124 u32 boxId;
125 u32 flashId;
126 u32 jtagDelay;
127 char *image_buf; /* image buffer for image pre-load */
128 u32 image_sz; /* total size of pre-loaded image buffer including
129 paddings */
130 u32 img_gap; /* gap between header and image start point */
131 u32 baudRate; /* debug print port baudrate */
132 u32 debugPortNum; /* debug print port number */
133 u32 debugPortMpp; /* debug print port MPP configuration */
134 union {
135 char *fname_arr[5];
136 struct {
137 char *in;
138 char *out;
139 char *hdr_out;
140 char *romc;
141 char *romd;
142 } fname;
144 } USER_OPTIONS;
146 /* Function declaration */
147 void print_usage(void);
149 /* 32 bit checksum */
150 MV_U32 checksum32(void *start, MV_U32 len, MV_U32 csum);
151 MV_U8 checksum8(void *start, MV_U32 len, MV_U8 csum);
152 MV_U32 crc32(MV_U32 crc, volatile MV_U32 *buf, MV_U32 len);
154 #endif /* _INC_DOIMAGE_H */