mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot2.git] / src / drivers / intel / fsp2_0 / hob_verify.c
blob0726b60da30d1881f7481bbfbe6e4a3983523bef
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <cbmem.h>
4 #include <console/console.h>
5 #include <fsp/util.h>
7 void fsp_verify_memory_init_hobs(void)
9 struct range_entry fsp_mem;
10 struct range_entry tolum;
12 /* Verify the size of the TOLUM range */
13 fsp_find_bootloader_tolum(&tolum);
14 if (range_entry_size(&tolum) < cbmem_overhead_size()) {
15 printk(BIOS_CRIT,
16 "FSP_BOOTLOADER_TOLUM_SIZE: 0x%08llx < 0x%08zx\n",
17 range_entry_size(&tolum), cbmem_overhead_size());
18 die("FSP_BOOTLOADER_TOLUM_HOB too small!\n");
21 /* Verify the bootloader tolum is above the FSP reserved area */
22 fsp_find_reserved_memory(&fsp_mem);
23 if (range_entry_end(&tolum) <= range_entry_base(&fsp_mem)) {
24 printk(BIOS_CRIT,
25 "TOLUM end: 0x%08llx != 0x%08llx: FSP rsvd base\n",
26 range_entry_end(&tolum), range_entry_base(&fsp_mem));
27 die("FSP reserved region after BIOS TOLUM!\n");
29 if (range_entry_base(&tolum) < range_entry_end(&fsp_mem)) {
30 printk(BIOS_CRIT,
31 "TOLUM base: 0x%08llx < 0x%08llx: FSP rsvd end\n",
32 range_entry_base(&tolum), range_entry_end(&fsp_mem));
33 die("FSP reserved region overlaps BIOS TOLUM!\n");
36 /* Verify that the FSP reserved area immediately follows the BIOS
37 * reserved area
39 if (range_entry_base(&tolum) != range_entry_end(&fsp_mem)) {
40 printk(BIOS_CRIT,
41 "TOLUM base: 0x%08llx != 0x%08llx: FSP rsvd end\n",
42 range_entry_base(&tolum), range_entry_end(&fsp_mem));
43 die("Space between FSP reserved region and BIOS TOLUM!\n");
46 if (range_entry_end(&tolum) != cbmem_top()) {
47 printk(BIOS_CRIT, "TOLUM end: 0x%08llx != %lx: cbmem_top\n",
48 range_entry_end(&tolum), cbmem_top());
49 die("Space between cbmem_top and BIOS TOLUM!\n");