mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot2.git] / src / drivers / uart / Makefile.mk
blob9fd1fb3998122310d10c146d760a0914f11b18ec
1 ## SPDX-License-Identifier: GPL-2.0-only
3 ifeq ($(CONFIG_DRIVERS_UART),y)
5 romstage-y += util.c
6 postcar-y += util.c
7 ramstage-y += util.c
8 bootblock-y += util.c
9 verstage-y += util.c
10 smm-$(CONFIG_DEBUG_SMI) += util.c
12 # Add the driver, only one can be enabled. The driver files may
13 # be located in the soc/ or cpu/ directories instead of here.
15 ifeq ($(CONFIG_DRIVERS_UART_8250IO),y)
16 bootblock-y += uart8250io.c
17 verstage-y += uart8250io.c
18 romstage-y += uart8250io.c
19 postcar-y += uart8250io.c
20 ramstage-y += uart8250io.c
21 smm-$(CONFIG_DEBUG_SMI) += uart8250io.c
22 endif
24 ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y)
25 bootblock-y += uart8250mem.c
26 verstage-y += uart8250mem.c
27 romstage-y += uart8250mem.c
28 postcar-y += uart8250mem.c
29 ramstage-y += uart8250mem.c
30 smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c
31 endif
33 ifeq ($(CONFIG_DRIVERS_UART_OXPCIE),y)
34 bootblock-y += oxpcie_early.c
35 verstage-y += oxpcie_early.c
36 romstage-y += oxpcie_early.c
37 postcar-y += oxpcie_early.c
38 ramstage-y += oxpcie_early.c oxpcie.c
39 endif
41 ifeq ($(CONFIG_DRIVERS_UART_PL011),y)
42 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c
43 romstage-y += pl011.c
44 postcar-y += pl011.c
45 ramstage-y += pl011.c
46 verstage-y += pl011.c
47 endif
49 ifeq ($(CONFIG_DRIVERS_UART_SIFIVE),y)
50 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += sifive.c
51 romstage-y += sifive.c
52 postcar-y += sifive.c
53 ramstage-y += sifive.c
54 endif
56 endif