1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #ifndef CPU_PPC64_SPR_H
4 #define CPU_PPC64_SPR_H
6 #include <arch/byteorder.h> // PPC_BIT()
11 #define SPR_PVR_REV_MASK (PPC_BITMASK(52, 55) | PPC_BITMASK(60, 63))
12 #define SPR_PVR_REV(maj, min) (PPC_SHIFT((maj), 55) | PPC_SHIFT((min), 63))
14 #define SPR_HSPRG0 0x130
15 #define SPR_HSPRG1 0x131
17 #define SPR_HRMOR 0x139
19 #define SPR_HMER 0x150
20 /* Bits in HMER/HMEER */
21 #define SPR_HMER_MALFUNCTION_ALERT PPC_BIT(0)
22 #define SPR_HMER_PROC_RECV_DONE PPC_BIT(2)
23 #define SPR_HMER_PROC_RECV_ERROR_MASKED PPC_BIT(3)
24 #define SPR_HMER_TFAC_ERROR PPC_BIT(4)
25 #define SPR_HMER_TFMR_PARITY_ERROR PPC_BIT(5)
26 #define SPR_HMER_XSCOM_FAIL PPC_BIT(8)
27 #define SPR_HMER_XSCOM_DONE PPC_BIT(9)
28 #define SPR_HMER_PROC_RECV_AGAIN PPC_BIT(11)
29 #define SPR_HMER_WARN_RISE PPC_BIT(14)
30 #define SPR_HMER_WARN_FALL PPC_BIT(15)
31 #define SPR_HMER_SCOM_FIR_HMI PPC_BIT(16)
32 #define SPR_HMER_TRIG_FIR_HMI PPC_BIT(17)
33 #define SPR_HMER_HYP_RESOURCE_ERR PPC_BIT(20)
34 #define SPR_HMER_XSCOM_STATUS PPC_BITMASK(21, 23)
35 #define SPR_HMER_XSCOM_OCCUPIED PPC_BIT(23)
40 static inline uint64_t read_spr(int spr
)
43 asm volatile("mfspr %0,%1" : "=r"(val
) : "i"(spr
) : "memory");
47 static inline void write_spr(int spr
, uint64_t val
)
49 asm volatile("mtspr %0, %1" :: "i"(spr
), "r"(val
) : "memory");
52 static inline uint64_t read_hmer(void)
54 return read_spr(SPR_HMER
);
57 static inline void clear_hmer(void)
59 write_spr(SPR_HMER
, 0);
62 static inline uint64_t read_msr(void)
65 asm volatile("mfmsr %0" : "=r"(val
) :: "memory");
69 static inline uint64_t pvr_revision(void)
71 return read_spr(SPR_PVR
) & SPR_PVR_REV_MASK
;
74 #endif /* __ASSEMBLER__ */
75 #endif /* CPU_PPC64_SPR_H */