mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
[coreboot2.git] / src / include / device / pci_ops.h
blob90c59fb2a0563a0114e84ae95adb7a9097118c23
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef PCI_OPS_H
4 #define PCI_OPS_H
6 #include <stdint.h>
7 #include <device/device.h>
8 #include <device/pci_type.h>
9 #include <arch/pci_ops.h> /* IWYU pragma: export */
11 void __noreturn pcidev_die(void);
13 static __always_inline pci_devfn_t pcidev_bdf(const struct device *dev)
15 return (dev->path.pci.devfn << 12) | (dev->upstream->secondary << 20) |
16 (dev->upstream->segment_group << 28);
19 static __always_inline pci_devfn_t pcidev_assert(const struct device *dev)
21 if (!dev)
22 pcidev_die();
23 return pcidev_bdf(dev);
26 #if defined(__SIMPLE_DEVICE__)
27 #define ENV_PCI_SIMPLE_DEVICE 1
28 #else
29 #define ENV_PCI_SIMPLE_DEVICE 0
30 #endif
32 #if ENV_PCI_SIMPLE_DEVICE
34 /* Avoid name collisions as different stages have different signature
35 * for these functions. The _s_ stands for simple, fundamental IO or
36 * MMIO variant.
38 #define pci_read_config8 pci_s_read_config8
39 #define pci_read_config16 pci_s_read_config16
40 #define pci_read_config32 pci_s_read_config32
41 #define pci_write_config8 pci_s_write_config8
42 #define pci_write_config16 pci_s_write_config16
43 #define pci_write_config32 pci_s_write_config32
44 #else
46 static __always_inline
47 u8 pci_read_config8(const struct device *dev, u16 reg)
49 return pci_s_read_config8(PCI_BDF(dev), reg);
52 static __always_inline
53 u16 pci_read_config16(const struct device *dev, u16 reg)
55 return pci_s_read_config16(PCI_BDF(dev), reg);
58 static __always_inline
59 u32 pci_read_config32(const struct device *dev, u16 reg)
61 return pci_s_read_config32(PCI_BDF(dev), reg);
64 static __always_inline
65 void pci_write_config8(const struct device *dev, u16 reg, u8 val)
67 pci_s_write_config8(PCI_BDF(dev), reg, val);
70 static __always_inline
71 void pci_write_config16(const struct device *dev, u16 reg, u16 val)
73 pci_s_write_config16(PCI_BDF(dev), reg, val);
76 static __always_inline
77 void pci_write_config32(const struct device *dev, u16 reg, u32 val)
79 pci_s_write_config32(PCI_BDF(dev), reg, val);
82 #endif
84 #if ENV_PCI_SIMPLE_DEVICE
85 static __always_inline
86 void pci_update_config8(pci_devfn_t dev, u16 reg, u8 mask, u8 or)
87 #else
88 static __always_inline
89 void pci_update_config8(const struct device *dev, u16 reg, u8 mask, u8 or)
90 #endif
92 u8 reg8;
94 reg8 = pci_read_config8(dev, reg);
95 reg8 &= mask;
96 reg8 |= or;
97 pci_write_config8(dev, reg, reg8);
100 #if ENV_PCI_SIMPLE_DEVICE
101 static __always_inline
102 void pci_update_config16(pci_devfn_t dev, u16 reg, u16 mask, u16 or)
103 #else
104 static __always_inline
105 void pci_update_config16(const struct device *dev, u16 reg, u16 mask, u16 or)
106 #endif
108 u16 reg16;
110 reg16 = pci_read_config16(dev, reg);
111 reg16 &= mask;
112 reg16 |= or;
113 pci_write_config16(dev, reg, reg16);
116 #if ENV_PCI_SIMPLE_DEVICE
117 static __always_inline
118 void pci_update_config32(pci_devfn_t dev, u16 reg, u32 mask, u32 or)
119 #else
120 static __always_inline
121 void pci_update_config32(const struct device *dev, u16 reg, u32 mask, u32 or)
122 #endif
124 u32 reg32;
126 reg32 = pci_read_config32(dev, reg);
127 reg32 &= mask;
128 reg32 |= or;
129 pci_write_config32(dev, reg, reg32);
132 #if ENV_PCI_SIMPLE_DEVICE
133 static __always_inline
134 void pci_and_config8(pci_devfn_t dev, u16 reg, u8 andmask)
135 #else
136 static __always_inline
137 void pci_and_config8(const struct device *dev, u16 reg, u8 andmask)
138 #endif
140 pci_update_config8(dev, reg, andmask, 0);
143 #if ENV_PCI_SIMPLE_DEVICE
144 static __always_inline
145 void pci_and_config16(pci_devfn_t dev, u16 reg, u16 andmask)
146 #else
147 static __always_inline
148 void pci_and_config16(const struct device *dev, u16 reg, u16 andmask)
149 #endif
151 pci_update_config16(dev, reg, andmask, 0);
154 #if ENV_PCI_SIMPLE_DEVICE
155 static __always_inline
156 void pci_and_config32(pci_devfn_t dev, u16 reg, u32 andmask)
157 #else
158 static __always_inline
159 void pci_and_config32(const struct device *dev, u16 reg, u32 andmask)
160 #endif
162 pci_update_config32(dev, reg, andmask, 0);
165 #if ENV_PCI_SIMPLE_DEVICE
166 static __always_inline
167 void pci_or_config8(pci_devfn_t dev, u16 reg, u8 ormask)
168 #else
169 static __always_inline
170 void pci_or_config8(const struct device *dev, u16 reg, u8 ormask)
171 #endif
173 pci_update_config8(dev, reg, 0xff, ormask);
176 #if ENV_PCI_SIMPLE_DEVICE
177 static __always_inline
178 void pci_or_config16(pci_devfn_t dev, u16 reg, u16 ormask)
179 #else
180 static __always_inline
181 void pci_or_config16(const struct device *dev, u16 reg, u16 ormask)
182 #endif
184 pci_update_config16(dev, reg, 0xffff, ormask);
187 #if ENV_PCI_SIMPLE_DEVICE
188 static __always_inline
189 void pci_or_config32(pci_devfn_t dev, u16 reg, u32 ormask)
190 #else
191 static __always_inline
192 void pci_or_config32(const struct device *dev, u16 reg, u32 ormask)
193 #endif
195 pci_update_config32(dev, reg, 0xffffffff, ormask);
198 u16 pci_s_find_next_capability(pci_devfn_t dev, u16 cap, u16 last);
199 u16 pci_s_find_capability(pci_devfn_t dev, u16 cap);
201 static __always_inline
202 u16 pci_find_next_capability(const struct device *dev, u16 cap, u16 last)
204 return pci_s_find_next_capability(PCI_BDF(dev), cap, last);
207 static __always_inline
208 u16 pci_find_capability(const struct device *dev, u16 cap)
210 return pci_s_find_capability(PCI_BDF(dev), cap);
214 * Determine if the given PCI device is the source of wake from sleep by checking PME_STATUS and
215 * PME_ENABLE bits in PM control and status register.
217 * Returns true if PCI device is wake source, false otherwise.
219 bool pci_dev_is_wake_source(pci_devfn_t dev);
221 #endif /* PCI_OPS_H */