1 # SPDX
-License
-Identifier
: GPL
-2.0-only
4 register
"common_config.espi_config" = "{
5 .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X2E_0X2F_EN,
6 .io_mode = ESPI_IO_MODE_QUAD,
7 .op_freq_mhz = ESPI_OP_FREQ_16_MHZ,
9 .alert_pin = ESPI_ALERT_PIN_PUSH_PULL,
16 # I2C Pad
Control RX
Select Configuration
17 register
"i2c_pad[0].rx_level" = "I2C_PAD_RX_3_3V"
18 register
"i2c_pad[1].rx_level" = "I2C_PAD_RX_3_3V"
19 register
"i2c_pad[2].rx_level" = "I2C_PAD_RX_3_3V"
20 register
"i2c_pad[3].rx_level" = "I2C_PAD_RX_3_3V"
22 register
"s0ix_enable" = "true"
24 register
"pspp_policy" = "DXIO_PSPP_BALANCED"
27 device ref iommu on
end
28 device ref gpp_gfx_bridge_0 on
end # MXM
29 device ref gpp_bridge_0 on
end # NVMe
30 device ref gpp_bridge_1 on
end
31 device ref gpp_bridge_2 on
end # WWAN
32 device ref gpp_bridge_3 on
end # LAN
33 device ref gpp_bridge_4 on
end # WLAN
34 device ref gpp_bridge_5 on
end
35 device ref gpp_bridge_a on # Internal GPP Bridge
0 to Bus A
36 device ref gfx on
end # Internal GPU
(GFX
)
37 device ref crypto on
end # Crypto Coprocessor
38 device ref xhci_0 on # USB
3.1 (USB0
)
40 device ref xhci_0_root_hub on
42 device ref usb3_port0 on
end
45 device ref usb3_port1 on
end
48 device ref usb2_port0 on
end
51 device ref usb2_port1 on
end
54 device ref usb2_port2 on
end
57 device ref usb2_port3 on
end
62 device ref xhci_1 on # USB
3.1 (USB1
)
64 device ref xhci_1_root_hub on
66 device ref usb3_port4 on
end
69 device ref usb3_port5 on
end
72 device ref usb2_port4 on
end
75 device ref usb2_port5 on
end
78 device ref usb2_port6 on
end
81 device ref usb2_port7 on
end
89 device ref uart_0 on
end # UART0