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drivers/usb/intel_bluetooth: Add GBTR Method
[coreboot2.git] / src / mainboard / google / brya / variants / anraggar / overridetree.cb
blob2f5b1d212b97643ce22a8a8b436bb04c38a22e34
1 fw_config
2 field WIFI 10 11
3 option UNKNOWN 0
4 option WIFI_6 1
5 option WIFI_6E 2
6 end
7 field CAMERA 12 13
8 option UF_720P_WF 0
9 option UF_1080P 1
10 option UF_720P 2
11 option UF_1080P_WF 3
12 end
13 field DB_AUX_BIAS 3 4
14 option REDRIVER 0
15 option SOC 1
16 end
17 end
18
19 chip soc/intel/alderlake
20 register "sagv" = "SaGv_Enabled"
21
22 # EMMC Tx CMD Delay
23 # Refer to EDS-Vol2-42.3.7.
24 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
25 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
26 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
27
28 # EMMC TX DATA Delay 1
29 # Refer to EDS-Vol2-42.3.8.
30 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
31 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
32 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
33
34 # EMMC TX DATA Delay 2
35 # Refer to EDS-Vol2-42.3.9.
36 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
37 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
38 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
39 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
40 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
41
42 # EMMC RX CMD/DATA Delay 1
43 # Refer to EDS-Vol2-42.3.10.
44 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
45 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
46 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
47 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
48 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B"
49
50 # EMMC RX CMD/DATA Delay 2
51 # Refer to EDS-Vol2-42.3.12.
52 # [17:16] stands for Rx Clock before Output Buffer,
53 # 00: Rx clock after output buffer,
54 # 01: Rx clock before output buffer,
55 # 10: Automatic selection based on working mode.
56 # 11: Reserved
57 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
58 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
59 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10051"
60
61 # EMMC Rx Strobe Delay
62 # Refer to EDS-Vol2-42.3.11.
63 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
64 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
65 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x01515"
66
67 # FIVR configurations for anraggar are disabled since the board doesn't have V1p05 and Vnn
68 # bypass rails implemented.
69 register "ext_fivr_settings" = "{
70 .configure_ext_fivr = 0,
71 }"
72
73 # Enable the Cnvi BT Audio Offload
74 register "cnvi_bt_audio_offload" = "1"
75
76 # Intel Common SoC Config
77 #+-------------+------------------------------+
78 #| Field | Value |
79 #+-------------+------------------------------+
80 #| I2C0 | TPM. Early init is |
81 #| | required to set up a BAR |
82 #| | for TPM communication |
83 #| I2C1 | Touchscreen |
84 #| I2C2 | Sub-board(PSensor)/WCAM |
85 #| I2C3 | Audio |
86 #| I2C5 | Trackpad |
87 #+-------------+------------------------------+
88 register "common_soc_config" = "{
89 .i2c[0] = {
90 .early_init = 1,
91 .speed = I2C_SPEED_FAST_PLUS,
92 .speed_config[0] = {
93 .speed = I2C_SPEED_FAST_PLUS,
94 .scl_lcnt = 55,
95 .scl_hcnt = 30,
96 .sda_hold = 7,
97 }
98 },
99 .i2c[1] = {
100 .speed = I2C_SPEED_FAST,
101 .speed_config[0] = {
102 .speed = I2C_SPEED_FAST,
103 .scl_lcnt = 160,
104 .scl_hcnt = 79,
105 .sda_hold = 7,
106 }
107 },
108 .i2c[2] = {
109 .speed = I2C_SPEED_FAST,
110 .speed_config[0] = {
111 .speed = I2C_SPEED_FAST,
112 .scl_lcnt = 157,
113 .scl_hcnt = 79,
114 .sda_hold = 7,
115 }
116 },
117 .i2c[3] = {
118 .speed = I2C_SPEED_FAST,
119 .speed_config[0] = {
120 .speed = I2C_SPEED_FAST,
121 .scl_lcnt = 157,
122 .scl_hcnt = 79,
123 .sda_hold = 7,
124 }
125 },
126 .i2c[5] = {
127 .speed = I2C_SPEED_FAST,
128 .speed_config[0] = {
129 .speed = I2C_SPEED_FAST,
130 .scl_lcnt = 152,
131 .scl_hcnt = 79,
132 .sda_hold = 7,
133 }
134 },
135 }"
136
137 # Power limit config
138 register "power_limits_config[ADL_N_041_6W_CORE]" = "{
139 .tdp_pl1_override = 15,
140 .tdp_pl2_override = 25,
141 .tdp_pl4 = 78,
142 }"
143
144 device domain 0 on
145 device ref dtt on
146 chip drivers/intel/dptf
147 ## sensor information
148 register "options.tsr[0].desc" = ""CPU_VR""
149 register "options.tsr[1].desc" = ""CPU""
150 register "options.tsr[2].desc" = ""Ambient""
151 register "options.tsr[3].desc" = ""Charger""
152
153 # TODO: below values are initial reference values only
154 ## Passive Policy
155 register "policies.passive" = "{
156 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
157 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000),
158 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 5000),
159 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000),
160 [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 75, 5000),
161 }"
162
163 ## Critical Policy
164 register "policies.critical" = "{
165 [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
166 [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN),
167 }"
168
169 register "controls.power_limits" = "{
170 .pl1 = {
171 .min_power = 6000,
172 .max_power = 15000,
173 .time_window_min = 28 * MSECS_PER_SEC,
174 .time_window_max = 32 * MSECS_PER_SEC,
175 .granularity = 200
176 },
177 .pl2 = {
178 .min_power = 25000,
179 .max_power = 25000,
180 .time_window_min = 28 * MSECS_PER_SEC,
181 .time_window_max = 32 * MSECS_PER_SEC,
182 .granularity = 1000
183 }
184 }"
185
186 ## Charger Performance Control (Control, mA)
187 register "controls.charger_perf" = "{
188 [0] = { 255, 3000 },
189 [1] = { 24, 1500 },
190 [2] = { 16, 1000 },
191 [3] = { 8, 500 }
192 }"
193
194 device generic 0 on end
195 end
196 end
197 device ref igpu on
198 chip drivers/gfx/generic
199 register "device_count" = "4"
200 # DDIA for eDP
201 register "device[0].name" = ""LCD0""
202 # Internal panel on the first port of the graphics chip
203 register "device[0].type" = "panel"
204 # DDIB for HDMI
205 # If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
206 register "device[1].name" = ""DD01""
207 # TCP0 (DP-1) for port C0
208 register "device[2].name" = ""DD02""
209 register "device[2].use_pld" = "true"
210 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
211 # TCP1 (DP-2) for port C1
212 register "device[3].name" = ""DD03""
213 register "device[3].use_pld" = "true"
214 register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
215 device generic 0 on end
216 end
217 end
218 device ref ipu on
219 chip drivers/intel/mipi_camera
220 register "acpi_uid" = "0x50000"
221 register "acpi_name" = ""IPU0""
222 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
223
224 register "cio2_num_ports" = "1"
225 register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
226 register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
227 register "cio2_prt[0]" = "1"
228 device generic 0 on
229 probe CAMERA UF_720P_WF
230 probe CAMERA UF_1080P_WF
231 end
232 end
233 end
234 device ref i2c1 on
235 chip drivers/i2c/hid
236 register "generic.hid" = ""ILTK0001""
237 register "generic.desc" = ""ILITEK Touchscreen""
238 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
239 register "generic.detect" = "1"
240 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
241 register "generic.reset_delay_ms" = "200"
242 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
243 register "generic.enable_delay_ms" = "12"
244 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
245 register "generic.stop_off_delay_ms" = "200"
246 register "generic.has_power_resource" = "1"
247 register "hid_desc_reg_offset" = "0x01"
248 device i2c 41 on end
249 end
250 chip drivers/generic/gpio_keys
251 register "name" = ""PENH""
252 register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
253 register "key.wake_gpe" = "GPE0_DW2_15"
254 register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
255 register "key.wakeup_event_action" = "EV_ACT_ANY"
256 register "key.dev_name" = ""EJCT""
257 register "key.linux_code" = "SW_PEN_INSERTED"
258 register "key.linux_input_type" = "EV_SW"
259 register "key.label" = ""pen_eject""
260 device generic 0 on end
261 end
262 end
263 device ref i2c2 on
264 chip drivers/intel/mipi_camera
265 register "acpi_hid" = ""OVTIDB10""
266 register "acpi_uid" = "0"
267 register "acpi_name" = ""CAM0""
268 register "chip_name" = ""Ov 13b10 Camera""
269 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
270
271 register "ssdb.lanes_used" = "4"
272 register "ssdb.vcm_type" = "0x0C"
273 register "vcm_name" = ""VCM0""
274 register "num_freq_entries" = "1"
275 register "link_freq[0]" = "560 * MHz"
276 register "remote_name" = ""IPU0""
277
278 register "has_power_resource" = "1"
279 #Controls
280 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
281 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
282
283 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
284 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1200_WCAM_X
285 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
286
287 #_ON
288 register "on_seq.ops_cnt" = "5"
289 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
290 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
291 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
292 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
293 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
294
295 #_OFF
296 register "off_seq.ops_cnt" = "4"
297 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
298 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
299 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
300 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
301
302 device i2c 36 on
303 probe CAMERA UF_720P_WF
304 probe CAMERA UF_1080P_WF
305 end
306 end
307 chip drivers/intel/mipi_camera
308 register "acpi_uid" = "2"
309 register "acpi_name" = ""VCM0""
310 register "chip_name" = ""DW9714 VCM ""
311 register "device_type" = "INTEL_ACPI_CAMERA_VCM"
312
313 register "vcm_compat" = ""dongwoon,dw9714""
314
315 register "has_power_resource" = "1"
316 #Controls
317 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_AFVDD
318
319 #_ON
320 register "on_seq.ops_cnt" = "1"
321 register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
322
323 #_OFF
324 register "off_seq.ops_cnt" = "1"
325 register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
326
327 device i2c 0C on
328 probe CAMERA UF_720P_WF
329 probe CAMERA UF_1080P_WF
330 end
331 end
332 chip drivers/intel/mipi_camera
333 register "acpi_uid" = "1"
334 register "acpi_name" = ""NVM0""
335 register "chip_name" = ""GT24P64E""
336 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
337
338 register "nvm_size" = "0x2000"
339 register "nvm_pagesize" = "1"
340 register "nvm_readonly" = "1"
341 register "nvm_width" = "0x10"
342 register "nvm_compat" = ""atmel,24c64""
343
344 device i2c 50 on
345 probe CAMERA UF_720P_WF
346 probe CAMERA UF_1080P_WF
347 end
348 end
349 end
350 device ref i2c3 on
351 chip drivers/i2c/rt5645
352 register "hid" = ""10EC5650""
353 register "name" = ""RT58""
354 register "desc" = ""Realtek RT5650""
355 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
356 register "cbj_sleeve" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
357 register "jd_mode" = "2"
358 device i2c 1a on end
359 end
360 end
361 device ref i2c5 on
362 chip drivers/i2c/hid
363 register "generic.hid" = ""PNP0C50""
364 register "generic.desc" = ""PRIMAX Touchpad""
365 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
366 register "generic.wake" = "GPE0_DW2_14"
367 register "generic.detect" = "1"
368 register "hid_desc_reg_offset" = "0x01"
369 device i2c 15 on end
370 end
371 end
372 device ref cnvi_wifi on
373 chip drivers/wifi/generic
374 register "wake" = "GPE0_PME_B0"
375 register "enable_cnvi_ddr_rfim" = "true"
376 register "add_acpi_dma_property" = "true"
377 device generic 0 on end
378 end
379 end
380 device ref pcie_rp4 on
381 # PCIe 4 WLAN
382 register "pch_pcie_rp[PCH_RP(4)]" = "{
383 .clk_src = 2,
384 .clk_req = 2,
385 .flags = PCIE_RP_LTR | PCIE_RP_AER,
386 }"
387 chip drivers/wifi/generic
388 register "wake" = "GPE0_DW1_03"
389 register "add_acpi_dma_property" = "true"
390 device pci 00.0 on end
391 end
392 end
393 device ref pch_espi on
394 chip ec/google/chromeec
395 use conn0 as mux_conn[0]
396 use conn1 as mux_conn[1]
397 device pnp 0c09.0 on end
398 end
399 end
400 device ref pmc hidden
401 chip drivers/intel/pmc_mux
402 device generic 0 on
403 chip drivers/intel/pmc_mux/conn
404 use usb2_port1 as usb2_port
405 use tcss_usb3_port2 as usb3_port
406 device generic 0 alias conn0 on end
407 end
408 chip drivers/intel/pmc_mux/conn
409 use usb2_port2 as usb2_port
410 use tcss_usb3_port1 as usb3_port
411 device generic 1 alias conn1 on end
412 end
413 end
414 end
415 end
416 device ref tcss_xhci on
417 chip drivers/usb/acpi
418 device ref tcss_root_hub on
419 chip drivers/usb/acpi
420 register "desc" = ""USB3 Type-C Port C0 (MLB)""
421 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
422 register "use_custom_pld" = "true"
423 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
424 device ref tcss_usb3_port2 on end
425 end
426 chip drivers/usb/acpi
427 register "desc" = ""USB3 Type-C Port C1 (DB)""
428 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
429 register "use_custom_pld" = "true"
430 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
431 device ref tcss_usb3_port1 on end
432 end
433 end
434 end
435 end
436 device ref xhci on
437 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C MB (7.5 inch)
438 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C DB (7.1 inch)
439 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MB (6.4 inch)
440 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A DB (6.2 inch)
441 register "usb2_ports[4]" = "USB2_PORT_SHORT(OC_SKIP)" # LTE (3.3 inch)
442 register "usb2_ports[5]" = "USB2_PORT_SHORT(OC_SKIP)" # UFC (3.7 inch)
443 register "usb2_ports[7]" = "USB2_PORT_SHORT(OC_SKIP)" # Bluetooth port for PCIe WLAN (2.5 inch)
444 register "usb2_ports[9]" = "USB2_PORT_SHORT(OC_SKIP)" # Bluetooth port for CNVi WLAN
445
446 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 Type-A port A0(MLB))
447 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 Type-A port A1(DB)
448 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 WWAN(LTE)
449 chip drivers/usb/acpi
450 device ref xhci_root_hub on
451 chip drivers/usb/acpi
452 register "desc" = ""USB2 Type-C Port C0 (MLB)""
453 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
454 register "use_custom_pld" = "true"
455 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
456 device ref usb2_port1 on end
457 end
458 chip drivers/usb/acpi
459 register "desc" = ""USB2 Type-C Port C1 (DB)""
460 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
461 register "use_custom_pld" = "true"
462 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
463 device ref usb2_port2 on end
464 end
465 chip drivers/usb/acpi
466 register "desc" = ""USB2 Type-A Port A0 (MLB)""
467 register "type" = "UPC_TYPE_A"
468 register "use_custom_pld" = "true"
469 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
470 device ref usb2_port3 on end
471 end
472 chip drivers/usb/acpi
473 register "desc" = ""USB2 Type-A Port A1 (DB)""
474 register "type" = "UPC_TYPE_A"
475 register "use_custom_pld" = "true"
476 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
477 device ref usb2_port4 on end
478 end
479 chip drivers/usb/acpi
480 register "desc" = ""USB2 LTE""
481 register "type" = "UPC_TYPE_INTERNAL"
482 device ref usb2_port5 on end
483 end
484 chip drivers/usb/acpi
485 register "desc" = ""USB2 UFC""
486 register "type" = "UPC_TYPE_INTERNAL"
487 device ref usb2_port6 on end
488 end
489 chip drivers/usb/acpi
490 register "desc" = ""PCIe Bluetooth""
491 register "type" = "UPC_TYPE_INTERNAL"
492 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
493 device ref usb2_port8 on end
494 end
495 chip drivers/usb/acpi
496 register "desc" = ""CNVi Bluetooth""
497 register "type" = "UPC_TYPE_INTERNAL"
498 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
499 device ref usb2_port10 on end
500 end
501 chip drivers/usb/acpi
502 register "desc" = ""USB3 Type-A Port A0 (MLB)""
503 register "type" = "UPC_TYPE_USB3_A"
504 register "use_custom_pld" = "true"
505 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
506 device ref usb3_port1 on end
507 end
508 chip drivers/usb/acpi
509 register "desc" = ""USB3 Type-A Port A1 (DB)""
510 register "type" = "UPC_TYPE_USB3_A"
511 register "use_custom_pld" = "true"
512 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
513 device ref usb3_port2 on end
514 end
515 chip drivers/usb/acpi
516 register "desc" = ""USB3 WWAN""
517 register "type" = "UPC_TYPE_INTERNAL"
518 device ref usb3_port3 on end
519 end
520 chip drivers/usb/acpi
521 register "desc" = ""USB3 WLAN""
522 register "type" = "UPC_TYPE_INTERNAL"
523 device ref usb3_port4 on end
524 end
525 end
526 end
527 end
528 device ref pcie_rp7 off end # SDCard
529 device ref hda on
530 chip drivers/sof
531 register "spkr_tplg" = "rt5650_sp"
532 register "jack_tplg" = "rt5650_hp"
533 register "mic_tplg" = "_2ch_pdm0"
534 device generic 0 on end
535 end
536 end
537 end
538 end
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