src/mainboard/google/brya/variants/gaelin/memory.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <gpio.h>
   6 #include <soc/romstage.h>
   7
   8 static const struct mb_cfg ddr4_mem_config = {
   9         .type = MEM_TYPE_DDR4,
  10
  11         .rcomp = {
  12                 /* Baseboard uses only 100ohm Rcomp resistors */
  13                 .resistor = 100,
  14
  15                 /* Baseboard Rcomp target values */
  16                 .targets = {50, 20, 25, 25, 25},
  17         },
  18
  19         .LpDdrDqDqsReTraining = 1,
  20
  21         .ect = 1, /* Early Command Training */
  22
  23         .UserBd = BOARD_TYPE_MOBILE,
  24
  25         .ddr_config = {
  26                 .dq_pins_interleaved = false,
  27         },
  28 };
  29
  30 const struct mb_cfg *variant_memory_params(void)
  31 {
  32         return &ddr4_mem_config;
  33 }
  34
  35 void variant_get_spd_info(struct mem_spd *spd_info)
  36 {
  37         spd_info->topo = MEM_TOPO_DIMM_MODULE;
  38         spd_info->smbus[0].addr_dimm[0] = 0x50;
  39         spd_info->smbus[0].addr_dimm[1] = 0x51;
  40         spd_info->smbus[1].addr_dimm[0] = 0x52;
  41         spd_info->smbus[1].addr_dimm[1] = 0x53;
  42 }