mb/google/fatcat: config GPP_F23 as ISH gpio pin
[coreboot2.git] / src / mainboard / google / brya / variants / gothrax / variant.c
bloba1fdc2333b0c33f684d6b6725ccb695c38cc6d42
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <console/console.h>
6 #include <fw_config.h>
8 void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
10 if (!fw_config_probe(FW_CONFIG(DB_USB, DB_C_A_LTE))) {
11 printk(BIOS_INFO, "Disable usb2_port5 and usb3_port3 of WWAN.\n");
13 config->usb2_ports[4].enable = 0;
14 config->usb2_ports[4].ocpin = OC_SKIP;
15 config->usb2_ports[4].tx_bias = USB2_BIAS_0MV;
16 config->usb2_ports[4].tx_emp_enable = USB2_EMP_OFF;
17 config->usb2_ports[4].pre_emp_bias = USB2_BIAS_0MV;
18 config->usb2_ports[4].pre_emp_bit = USB2_HALF_BIT_PRE_EMP;
20 config->usb3_ports[2].enable = 0;
21 config->usb3_ports[2].ocpin = OC_SKIP;
22 config->usb3_ports[2].tx_de_emp = 0x00;
23 config->usb3_ports[2].tx_downscale_amp = 0x00;
26 if (!fw_config_probe(FW_CONFIG(WFC, WFC_PRESENT))) {
27 printk(BIOS_INFO, "Disable usb2_port7 of WFC.\n");
28 config->usb2_ports[6].enable = 0;
29 config->usb2_ports[6].ocpin = OC_SKIP;
30 config->usb2_ports[6].tx_bias = USB2_BIAS_0MV;
31 config->usb2_ports[6].tx_emp_enable = USB2_EMP_OFF;
32 config->usb2_ports[6].pre_emp_bias = USB2_BIAS_0MV;
33 config->usb2_ports[6].pre_emp_bit = USB2_HALF_BIT_PRE_EMP;
36 if (fw_config_probe(FW_CONFIG(DB_USB, DB_A))) {
37 printk(BIOS_INFO, "Disable typec aux_bias_pads in the SOC.\n");
38 config->typec_aux_bias_pads[1].pad_auxp_dc = 0x00;
39 config->typec_aux_bias_pads[1].pad_auxn_dc = 0x00;