soc/mediatek/mt8196: Add PMIC MT6373 driver
[coreboot2.git] / src / mainboard / google / fizz / variants / endeavour / overridetree.cb
blobf359bf3a6a777e03199b255fe4d14e4266da6aaa
1 chip soc/intel/skylake
3 register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # TPU
4 register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # TPM
5 register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # None
6 register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # HDMI
7 register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio
9 register "SerialIoDevMode" = "{
10 [PchSerialIoIndexI2C0] = PchSerialIoPci,
11 [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
12 [PchSerialIoIndexI2C2] = PchSerialIoPci,
13 [PchSerialIoIndexI2C3] = PchSerialIoPci,
14 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
15 [PchSerialIoIndexI2C5] = PchSerialIoPci,
16 [PchSerialIoIndexSpi0] = PchSerialIoPci,
17 [PchSerialIoIndexSpi1] = PchSerialIoDisabled,
18 [PchSerialIoIndexUart0] = PchSerialIoSkipInit,
19 [PchSerialIoIndexUart1] = PchSerialIoDisabled,
20 [PchSerialIoIndexUart2] = PchSerialIoSkipInit,
23 device domain 0 on
24 device ref south_xhci on
25 register "usb2_ports[0]" = "USB2_PORT_LONG(OC_SKIP)" # Type-C
26 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # HDMI
27 register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Rear
28 register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Rear
29 register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # Type-A Rear
30 register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # HDMI Audio
31 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
33 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C
34 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # HDMI
35 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Rear
36 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Rear
37 register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Rear
39 chip drivers/usb/acpi
40 device usb 0.0 on
41 chip drivers/usb/acpi
42 register "desc" = ""USB2 HDMI In""
43 register "type" = "UPC_TYPE_INTERNAL"
44 device usb 2.1 on end
45 end
46 chip drivers/usb/acpi
47 register "desc" = ""USB2 Type-A Rear Left""
48 register "type" = "UPC_TYPE_A"
49 device usb 2.2 on end
50 end
51 chip drivers/usb/acpi
52 register "desc" = ""USB2 Type-A Rear Middle""
53 register "type" = "UPC_TYPE_A"
54 device usb 2.3 on end
55 end
56 chip drivers/usb/acpi
57 register "desc" = ""USB2 Type-A Rear Right""
58 register "type" = "UPC_TYPE_A"
59 device usb 2.4 on end
60 end
61 chip drivers/usb/acpi
62 register "desc" = ""USB2 HDMI Audio In""
63 register "type" = "UPC_TYPE_INTERNAL"
64 device usb 2.5 on end
65 end
66 chip drivers/usb/acpi
67 register "desc" = ""USB3 HDMI Video In""
68 register "type" = "UPC_TYPE_INTERNAL"
69 device usb 3.1 on end
70 end
71 chip drivers/usb/acpi
72 register "desc" = ""USB3 Type-A Rear Left""
73 register "type" = "UPC_TYPE_USB3_A"
74 device usb 3.2 on end
75 end
76 chip drivers/usb/acpi
77 register "desc" = ""USB3 Type-A Rear Middle""
78 register "type" = "UPC_TYPE_USB3_A"
79 device usb 3.3 on end
80 end
81 chip drivers/usb/acpi
82 register "desc" = ""USB3 Type-A Rear Right""
83 register "type" = "UPC_TYPE_USB3_A"
84 device usb 3.4 on end
85 end
86 device usb 3.5 off end
87 end
88 end
89 end
90 device ref i2c3 on
91 chip drivers/i2c/generic
92 register "hid" = "ACPI_DT_NAMESPACE_HID"
93 register "desc" = ""Chrontel 7322""
94 register "uid" = "1"
95 register "compat_string" = ""chrontel,ch7322""
96 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_HIGH(GPP_A18)"
97 device i2c 75 on end
98 end
99 chip drivers/i2c/generic
100 register "hid" = "ACPI_DT_NAMESPACE_HID"
101 register "desc" = ""Chrontel 7322""
102 register "uid" = "2"
103 register "compat_string" = ""chrontel,ch7322""
104 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_HIGH(GPP_A20)"
105 device i2c 76 on end
108 device ref i2c5 on
109 chip drivers/i2c/generic
110 register "hid" = ""10EC5663""
111 register "name" = ""RT53""
112 register "desc" = ""Realtek RT5663""
113 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)"
114 device i2c 13 on end
117 device ref pcie_rp7 on
118 # x1 TPU1
119 register "PcieRpEnable[6]" = "1"
120 register "PcieRpClkReqSupport[6]" = "1"
121 register "PcieRpClkReqNumber[6]" = "4"
122 register "PcieRpAdvancedErrorReporting[6]" = "1"
123 register "PcieRpLtrEnable[6]" = "1"
124 register "PcieRpClkSrcNumber[6]" = "4"
126 device ref pcie_rp8 on
127 # x1 TPU0
128 register "PcieRpEnable[7]" = "1"
129 register "PcieRpClkReqSupport[7]" = "1"
130 register "PcieRpClkReqNumber[7]" = "2"
131 register "PcieRpAdvancedErrorReporting[7]" = "1"
132 register "PcieRpLtrEnable[7]" = "1"
133 register "PcieRpClkSrcNumber[7]" = "2"
135 device ref pcie_rp9 on
136 # x4 i350 LAN
137 register "PcieRpEnable[8]" = "1"
138 register "PcieRpClkReqSupport[8]" = "0"
139 register "PcieRpAdvancedErrorReporting[8]" = "1"
140 register "PcieRpLtrEnable[8]" = "1"
141 register "PcieRpClkSrcNumber[8]" = "2"
143 device ref pcie_rp10 off
144 register "PcieRpEnable[9]" = "0"
146 device ref pcie_rp11 off
147 register "PcieRpEnable[10]" = "0"
149 device ref pcie_rp12 off
150 register "PcieRpEnable[11]" = "0"