src/mainboard/google/parrot/devicetree.cb

   1 chip northbridge/intel/sandybridge
   2         # IGD Displays
   3         register "gfx" = "GMA_STATIC_DISPLAYS(0)"
   4
   5         # Enable DisplayPort B Hotplug with 6ms pulse
   6         register "gpu_dp_b_hotplug" = "0x06"
   7
   8         # Enable Panel as LVDS and configure power delays
   9         register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
  10         register "gpu_panel_power_cycle_delay" = "5"            # 400ms
  11         register "gpu_panel_power_up_delay" = "500"             # 50ms
  12         register "gpu_panel_power_down_delay" = "150"           # 15ms
  13         register "gpu_panel_power_backlight_on_delay" = "2100"  # 210ms
  14         register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
  15
  16         # Set backlight PWM values
  17         register "gpu_cpu_backlight" = "0x000001d4"
  18         register "gpu_pch_backlight" = "0x03aa0000"
  19
  20         register "spd_addresses" = "{0x50, 0, 0x52, 0}"
  21         register "ec_present" = "1"
  22         # FIXME: Native raminit requires reduced max clock
  23         register "max_mem_clock_mhz" = "CONFIG(USE_NATIVE_RAMINIT) ? 666 : 800"
  24
  25         device domain 0 on
  26                 device ref host_bridge on end # host bridge
  27                 device ref igd on end # vga controller
  28
  29                 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
  30                         # GPI routing
  31                         #  0 No effect (default)
  32                         #  1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
  33                         #  2 SCI (if corresponding GPIO_EN bit is also set)
  34                         # Set Lid Switch to SMI to capture in recovery mode.  It gets reset to
  35                         # SCI mode when we go to ACPI mode.
  36                         register "alt_gp_smi_en" = "0x8100"
  37                         register "gpi7_routing" = "2"
  38                         register "gpi8_routing" = "1"
  39                         register "gpi15_routing" = "1" #lid switch gpe
  40
  41                         register "sata_port_map" = "0x1"
  42
  43                         register "usb_port_config" = "{
  44                                 {0, 0, -1}, /* P0: Empty */
  45                                 {1, 0, 0}, /* P1: Left USB 1  (OC0) */
  46                                 {1, 0, 1}, /* P2: Left USB 2  (OC1) */
  47                                 {1, 0, 1}, /* P3: Left USB 3  (OC1) */
  48                                 {0, 0, -1}, /* P4-P7: Empty */
  49                                 {0, 0, -1},
  50                                 {0, 0, -1},
  51                                 {0, 0, -1},
  52                                 /* Empty and onboard Ports 8-13, set to un-used pin OC4 */
  53                                 {1, 0, -1}, /* P8: MiniPCIe (WLAN) (no OC) */
  54                                 {0, 0, -1}, /* P9: Empty */
  55                                 {1, 0, -1}, /* P10: Camera (no OC) */
  56                                 {0, 0, -1}, {0, 0, -1}, {0, 0, -1}
  57                         }"
  58
  59                         # EC range is 0xFD60 (EC_IO) and 0x68/0x6C
  60                         register "gen1_dec" = "0x0004fd61"
  61                         register "gen2_dec" = "0x00040069"
  62
  63                         # Enable zero-based linear PCIe root port functions
  64                         register "pcie_port_coalesce" = "true"
  65
  66                         device ref mei1 on end # Management Engine Interface 1
  67                         device ref mei2 off end # Management Engine Interface 2
  68                         device ref me_ide_r off end # Management Engine IDE-R
  69                         device ref me_kt off end # Management Engine KT
  70                         device ref gbe off end # Intel Gigabit Ethernet
  71                         device ref ehci2 on end # USB2 EHCI #2
  72                         device ref hda on end # High Definition Audio
  73                         device ref pcie_rp1 off end # PCIe Port #1
  74                         device ref pcie_rp2 on end # PCIe Port #2 (WLAN)
  75                         device ref pcie_rp3 on end # PCIe Port #3 (ETH0)
  76                         device ref pcie_rp4 off end # PCIe Port #4
  77                         device ref pcie_rp5 off end # PCIe Port #5
  78                         device ref pcie_rp6 off end # PCIe Port #6
  79                         device ref pcie_rp7 off end # PCIe Port #7
  80                         device ref pcie_rp8 off end # PCIe Port #8
  81                         device ref ehci1 on end # USB2 EHCI #1
  82                         device ref pci_bridge off end # PCI bridge
  83                         device ref lpc on
  84                                 chip ec/compal/ene932
  85                                         # 60/64 KBC
  86                                         device pnp ff.1 on # dummy address
  87                                         end
  88                                 end
  89                         end # LPC bridge
  90                         device ref sata1 on end # SATA Controller 1
  91                         device ref smbus on
  92                                 subsystemid 0x18D1 0x04B4
  93                         end # SMBus
  94                         device ref sata2 off end # SATA Controller 2
  95                         device ref thermal on end # Thermal
  96                 end
  97         end
  98 end