mb/google/rauru: Implement regulator interface
[coreboot2.git] / src / mainboard / hp / snb_ivb_desktops / devicetree.cb
blob113b5551ef8d3294c15a5ac48d17034b9010ac0e
1 ## SPDX-License-Identifier: GPL-2.0-only
3 chip northbridge/intel/sandybridge
4 register "gfx.use_spread_spectrum_clock" = "0"
5 register "gpu_dp_b_hotplug" = "0"
6 register "gpu_dp_c_hotplug" = "0"
7 register "gpu_dp_d_hotplug" = "0"
8 # BTX mainboard: Reversed mapping
9 register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}"
11 device domain 0 on
12 device ref host_bridge on end
13 device ref peg10 on end
14 device ref igd on end
15 device ref peg60 off end
17 chip southbridge/intel/bd82x6x # Intel Series 7 PCH
18 register "docking_supported" = "0"
19 register "gen1_dec" = "0x00fc0601"
20 register "gen2_dec" = "0x00fc0801"
21 register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
22 register "pcie_port_coalesce" = "true"
23 register "sata_interface_speed_support" = "0x3"
24 register "spi_lvscc" = "0x2005"
25 register "spi_uvscc" = "0x2005"
27 device ref mei1 on end
28 device ref mei2 off end
29 device ref me_ide_r off end
30 device ref me_kt on end
31 device ref gbe on end
32 device ref ehci2 on end
33 device ref hda on end
34 device ref pcie_rp1 on end
35 device ref pcie_rp2 off end
36 device ref pcie_rp3 off end
37 device ref pcie_rp4 off end
38 device ref pcie_rp5 on end
39 device ref pcie_rp6 off end
40 device ref pcie_rp7 off end
41 device ref pcie_rp8 off end
42 device ref ehci1 on end
43 device ref pci_bridge on end
44 device ref lpc on
45 chip superio/common
46 device pnp 2e.ff on # passes SIO base addr to SSDT gen
47 chip superio/nuvoton/npcd378
48 device pnp 2e.0 off end # Floppy
49 device pnp 2e.1 on # Parallel port
50 # global
52 # serialice: Vendor writes:
53 irq 0x14 = 0x9c
54 irq 0x1c = 0xa8
55 irq 0x1d = 0x08
56 irq 0x22 = 0x3f
57 irq 0x1a = 0xb0
58 # dumped from superiotool:
59 irq 0x1b = 0x1e
60 irq 0x27 = 0x08
61 irq 0x2a = 0x20
62 irq 0x2d = 0x01
63 # parallel port
64 io 0x60 = 0x378
65 irq 0x70 = 0x07
66 drq 0x74 = 0x01
67 end
68 device pnp 2e.2 off # COM1
69 io 0x60 = 0x2f8
70 irq 0x70 = 3
71 end
72 device pnp 2e.3 on # COM2, IR
73 io 0x60 = 0x3f8
74 irq 0x70 = 4
75 end
76 device pnp 2e.4 on # LED control
77 io 0x60 = 0x600
78 # IOBASE[0h] = bit0 LED red / green
79 # IOBASE[0h] = bit1-4 LED PWM duty cycle
80 # IOBASE[1h] = bit6 SWCC
82 io 0x62 = 0x610
83 # IOBASE [0h] = GPES
84 # IOBASE [1h] = GPEE
85 # IOBASE [4h:7h] = 32bit upcounter at 1Mhz
86 # IOBASE [8h:bh] = GPS
87 # IOBASE [ch:fh] = GPE
88 end
89 device pnp 2e.5 on # Mouse
90 irq 0x70 = 0xc
91 end
92 device pnp 2e.6 on # Keyboard
93 io 0x60 = 0x0060
94 io 0x62 = 0x0064
95 irq 0x70 = 0x01
96 # serialice: Vendor writes:
97 drq 0xf0 = 0x40
98 end
99 device pnp 2e.7 on # WDT ?
100 io 0x60 = 0x620
102 device pnp 2e.8 on # HWM
103 io 0x60 = 0x800
104 # IOBASE[0h:feh] HWM page
105 # IOBASE[ffh] bit0-bit3 page selector
107 drq 0xf0 = 0x20
108 drq 0xf1 = 0x01
109 drq 0xf2 = 0x40
110 drq 0xf3 = 0x01
112 drq 0xf4 = 0x66
113 drq 0xf5 = 0x67
114 drq 0xf6 = 0x66
115 drq 0xf7 = 0x01
117 device pnp 2e.f on # GPIO OD ?
118 drq 0xf1 = 0x97
119 drq 0xf2 = 0x01
120 drq 0xf5 = 0x08
121 drq 0xfe = 0x80
123 device pnp 2e.15 on # BUS ?
124 io 0x60 = 0x0680
125 io 0x62 = 0x0690
127 device pnp 2e.1c on # Suspend Control ?
128 io 0x60 = 0x640
129 # writing to IOBASE[5h]
130 # 0x0: Power off
131 # 0x9: Power off and bricked until CMOS battery removed
133 device pnp 2e.1e on # GPIO ?
134 io 0x60 = 0x660
135 drq 0xf4 = 0x01
136 # skip the following, as it
137 # looks like remapped registers
138 #drq 0xf5 = 0x06
139 #drq 0xf6 = 0x60
140 #drq 0xfe = 0x03
145 chip drivers/pc80/tpm
146 device pnp 4e.0 on end # TPM module
149 device ref sata1 on end
150 device ref smbus on end
151 device ref sata2 off end
152 device ref thermal off end